25 September 2013 Pattern transfer of directed self-assembly patterns for CMOS device applications
Hsin-Yu Tsai, Hiroyuki Miyazoe, Sebastian U. Engelmann, Chi-Chun Liu, Lynne M. Gignac, James J. Bucchignano, David P. Klaus, Christopher M. Breslin, Eric A. Joseph, Joy Y. Cheng, Daniel P. Sanders, Michael A. Guillorn
Author Affiliations +
Abstract
A study on the optimization of etch transfer processes using 200-mm-scale production type plasma etch tools for circuit relevant patterning in the sub-30-nm pitch regime using directed self-assembly (DSA) line–space patterning is presented. This work focuses on etch stack selection and process tuning, such as plasma power, chuck temperature, and end point strategy, to improve critical dimension control, pattern fidelity, and process window. Results from DSA patterning of gate structures featuring a high-k dielectric, a metal nitride and poly Si gate electrode, and a SiN capping layer are also presented. These results further establish the viability of DSA pattern generation as a potential method for Complementary metal–oxide–semiconductor (CMOS) integrated circuit patterning beyond the 10-nm node.
© 2013 Society of Photo-Optical Instrumentation Engineers (SPIE) 0091-3286/2013/$25.00 © 2013 SPIE
Hsin-Yu Tsai, Hiroyuki Miyazoe, Sebastian U. Engelmann, Chi-Chun Liu, Lynne M. Gignac, James J. Bucchignano, David P. Klaus, Christopher M. Breslin, Eric A. Joseph, Joy Y. Cheng, Daniel P. Sanders, and Michael A. Guillorn "Pattern transfer of directed self-assembly patterns for CMOS device applications," Journal of Micro/Nanolithography, MEMS, and MOEMS 12(4), 041305 (25 September 2013). https://doi.org/10.1117/1.JMM.12.4.041305
Published: 25 September 2013
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Cited by 8 scholarly publications and 1 patent.
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KEYWORDS
Etching

Directed self assembly

Optical lithography

Photomasks

Silicon

Carbon

Polymethylmethacrylate

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