Paper
4 January 1986 Sideways Summer
Edmond S. Cooley, Scott J. Israel
Author Affiliations +
Abstract
Novel circuitry that logarithmically reduces the number of adder delays needed for converting mixed binary to true binary is introduced. This circuitry, which has been built with standard TTL parts, can be easily improved using high speed VLSI CMOS, thereby increasing the overall efficiency of multiplier/converter modules.
© (1986) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Edmond S. Cooley and Scott J. Israel "Sideways Summer", Proc. SPIE 0564, Real-Time Signal Processing VIII, (4 January 1986); https://doi.org/10.1117/12.949710
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CITATIONS
Cited by 1 scholarly publication.
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KEYWORDS
Binary data

Analog electronics

Signal processing

Very large scale integration

Computing systems

Optical computing

Data transmission

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