Paper
24 November 2021 A cost-cutting solution for coherent optical device packaging: wafer-level combine test of optical and analog chips
Luluzi Lu, Quan Cao, Shichao Zhu, Sheng Yu, Xun Lei
Author Affiliations +
Proceedings Volume 12066, AOPC 2021: Micro-optics and MOEMS; 120660S (2021) https://doi.org/10.1117/12.2604509
Event: Applied Optics and Photonics China 2021, 2021, Beijing, China
Abstract
The wafer-level co-test of optical and analog chips is demonstrated to be cost-cutting solution for coherent optical device packaging. The extinction ratio test and the phase error test are illustrated for example.
© (2021) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Luluzi Lu, Quan Cao, Shichao Zhu, Sheng Yu, and Xun Lei "A cost-cutting solution for coherent optical device packaging: wafer-level combine test of optical and analog chips", Proc. SPIE 12066, AOPC 2021: Micro-optics and MOEMS, 120660S (24 November 2021); https://doi.org/10.1117/12.2604509
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KEYWORDS
Wafer-level optics

Packaging

Wafer testing

Analog electronics

Optical components

Optical testing

Modulators

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