Study on low-power test data compression method for 3D chips

Dengfeng Wang; Yunfei Zhang

doi:10.1117/12.2688769

18 July 2023 Study on low-power test data compression method for 3D chips

Dengfeng Wang, Yunfei Zhang

Proceedings Volume 12744, Second International Conference on Advanced Manufacturing Technology and Manufacturing Systems (ICAMTMS 2023); 127440F (2023) https://doi.org/10.1117/12.2688769
Event: Second International Conference on Advanced Manufacturing Technology and Manufacturing Systems (ICAMTMS 2023), 2023, Nanjing, China

Abstract

Three-dimensional chips require more complex test structures in different test phases, and the test data storage and test power consumption will be greatly increased, so the test cost will be more expensive. To address the above problems, this paper focuses on test data compression and test power consumption and proposes a low-power test data compression scheme for three-dimensional chips. First, for the problem of large test data storage, this paper proposes a very effective test data compression scheme, based on Golomb tour coding compression, which greatly improves the compression rate of test data and reduces the test data storage volume. Second, for the test data compression at the same time, the test shift power consumption and excellent optimization effect, greatly reducing the test power consumption. Finally, this paper proposes a low-power test data compression structure applicable to three-dimensional chip testing and gives the test flow control in each test phase of the three-dimensional chip. The experimental results show that the average compression rate of this scheme reaches 89.72% and the average power consumption is reduced by 86.53%, which effectively reduces the test cost of the 3D chip.

Citation Download Citation

Dengfeng Wang and Yunfei Zhang "Study on low-power test data compression method for 3D chips", Proc. SPIE 12744, Second International Conference on Advanced Manufacturing Technology and Manufacturing Systems (ICAMTMS 2023), 127440F (18 July 2023); https://doi.org/10.1117/12.2688769

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KEYWORDS

Data compression

Power consumption

Data storage

3D optical data storage

Signal processing

Multiplexers

Design and modelling

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