Fast full chip curvilinear MRC for advanced manufacturing nodes

Nassima Zeggaoui; Rachit Sharma; Junjiang Lei; Ingo Bork

doi:10.1117/12.3011100

10 April 2024 Fast full chip curvilinear MRC for advanced manufacturing nodes

Nassima Zeggaoui, Rachit Sharma, Junjiang Lei, Ingo Bork

Proceedings Volume 12954, DTCO and Computational Patterning III; 1295417 (2024) https://doi.org/10.1117/12.3011100
Event: SPIE Advanced Lithography + Patterning, 2024, San Jose, California, United States

Abstract

Inverse lithography technology (ILT) and Curvilinear masks (CL masks) are playing a critical role in addressing the challenges of EUV as we move toward advanced nodes. However, CL masks may have shapes that are more challenging to Mask Rule Check (MRC) clean-up and mask manufacturing, like sharp angles, T/Y junctions, sharp turns, and too-small features. Running a CLMRC checks before mask making is a general practice that allows to quickly screen the full chip and identify potential mask problems before mask inspection. Last year, we presented one of the CLILT solutions to address the MRC challenges on the CLILT masks [1,2 and 3]. In this paper, we present a comprehensive study of the curvilinear Mask Rule Check (CL MRC) quality and runtime. We compare and discuss different CL MRC check and quality of the results. We will describe how to properly filter measurements to flag true MRC violations while excluding false violations. Finally, we demonstrate a flow to achieve significant runtime improvement on a full chip database.

Conference Presentation

(2024) Published by SPIE. Downloading of the abstract is permitted for personal use only.

Citation Download Citation

Nassima Zeggaoui, Rachit Sharma, Junjiang Lei, and Ingo Bork "Fast full chip curvilinear MRC for advanced manufacturing nodes", Proc. SPIE 12954, DTCO and Computational Patterning III, 1295417 (10 April 2024); https://doi.org/10.1117/12.3011100

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