Measurements on the NIST GEC reference cell

James R. Roberts; James K. Olthoff; R. J. Van Brunt; James R. Whetstone

doi:10.1117/12.48936

1 March 1991 Measurements on the NIST GEC reference cell

James R. Roberts, James K. Olthoff, R. J. Van Brunt, James R. Whetstone

Proceedings Volume 1392, Advanced Techniques for Integrated Circuit Processing; (1991) https://doi.org/10.1117/12.48936
Event: Processing Integration, 1990, Santa Clara, CA, United States

Abstract

Measurements performed on the NIST GEC Reference Cell are described. The Reference Cell concept grew out of a workshop held at the 1988 Gaseous Electronics Conference (GEC) (October 18-22 1988 Minneapolis MN). The design was refined by the GEC community reviewed at a workshop hosted by SEMATECH1 (March 9 1989) and the final design was engineered at Sandia National Laboratory. The purpose of the discharge cell is to provide an affordable experimental platform for researchers that is physically identical from laboratory to laboratory so that reference data can be generated and various experimental techniques and models can be cross correlated. Four laboratories (Sandia Bell Labs WrightPatterson Air Force Base and NIST) agreed to conduct identical initial measurements on four cells manufactured at the same time. This would ensure the greatest possible uniformity and allow direct comparison of results. The experimental conditions for the present measurements are those specified for intercomparison and include 1" interelectrode spacing grounded lower electrode capacitively coupled RF power cooled electrodes (20 C) electrode ground shields and 99. 999 argon. The specific measurements to be made were: 1) the waveforms of the fundamental through the fifth harmonic of the RF voltage and current including their magnitude and phase 2) the gas flow rate and pressure and 3) the DC self-bias voltage.

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James R. Roberts, James K. Olthoff, R. J. Van Brunt, and James R. Whetstone "Measurements on the NIST GEC reference cell", Proc. SPIE 1392, Advanced Techniques for Integrated Circuit Processing, (1 March 1991); https://doi.org/10.1117/12.48936

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