Fault-tolerant array processor for parallel image processing

Oleg V. Podroobny

doi:10.1117/12.161483

4 November 1993 Fault-tolerant array processor for parallel image processing

Oleg V. Podroobny

Proceedings Volume 1976, High-Definition Video; (1993) https://doi.org/10.1117/12.161483
Event: Video Communications and Fiber Optic Networks, 1993, Berlin, Germany

Abstract

Parallel image processing systems with numerous processing elements (PE), connected in local and regular net, must be fault-tolerant for better reliability and better yield when realized by VLSI technology. The fault-tolerant array processor described in this paper has a regular array of simple programmable PEs and a distributed hardware sub-system for selftesting, selfdiagnostics, and selfreconfiguration.

Citation Download Citation

Oleg V. Podroobny "Fault-tolerant array processor for parallel image processing", Proc. SPIE 1976, High-Definition Video, (4 November 1993); https://doi.org/10.1117/12.161483

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