Line end design intent estimation using curves

Chi-Yuan Hung; Gensheng Gao; Steven Zhang; Ze-Xi Deng; Christopher Cork; Lawrence S. Melvin III; Yan Jiang

doi:10.1117/12.604526

5 May 2005 Line end design intent estimation using curves

Chi-Yuan Hung, Gensheng Gao, Steven Zhang, Ze-Xi Deng, Christopher Cork, Lawrence S. Melvin III, Yan Jiang

Proceedings Volume 5756, Design and Process Integration for Microelectronic Manufacturing III; (2005) https://doi.org/10.1117/12.604526
Event: Microlithography 2005, 2005, San Jose, California, United States

Abstract

Semiconductor foundries need to have a single, standard mask preparation procedure to deal with the large number of designs they receive. This data is typically of two sorts; the random logic over which they have little control of how the design intent is represented; and cells from dense arrays such as memory, often with design rule violations, whose OPC correction needs to be precisely optimized to achieve best yield and device performance. Occasionally the input data will contain sub-resolvable notches and extensions, which while not violating DRC specifications, would, if filled, result in DRC violations. This may be due to a non DFM aware automated layout tool, or a designer aggressively trying to minimize circuit density. In practice it is worthwhile to clean up these notches to ease OPC correction. Doing this should not result in printability errors as these notches typically represent a more complex curved design intent that cannot be accurately represented due to the restrictions imposed by the limited number of polygon edge directions available for layout. Similarly, memory cell layouts often have significant implied curvature. These may only be corrected properly if the OPC target point is defined precisely for each individual segment. In general, letting the OPC correction engine correct a layout defined by a realistic, curved target shape gives better quality corrections with greater process window. The challenge for the OPC engineer working in a foundry is therefore to determine a clean-up methodology for incoming data and to correctly apply the design intent, where necessary, from the original pre-cleanup data. A programmable OPC engine gives the user flexibility in optimizing the set of rules embedded in the OPC cleanup and correction recipes. These embed within them the algorithms to interpret the rounding on the desired silicon image not only for line-ends and corners of random logic but also the more complex curved silicon images and tolerances required by memory cells.

Citation Download Citation

Chi-Yuan Hung, Gensheng Gao, Steven Zhang, Ze-Xi Deng, Christopher Cork, Lawrence S. Melvin III, and Yan Jiang "Line end design intent estimation using curves", Proc. SPIE 5756, Design and Process Integration for Microelectronic Manufacturing III, (5 May 2005); https://doi.org/10.1117/12.604526

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available