Paper
10 May 2007 Variable length packet scheduler algorithm with QoS support
Author Affiliations +
Proceedings Volume 6590, VLSI Circuits and Systems III; 659012 (2007) https://doi.org/10.1117/12.721947
Event: Microtechnologies for the New Millennium, 2007, Maspalomas, Gran Canaria, Spain
Abstract
A novel variable length packet scheduling algorithm focused on real output queue reference architecture is presented in this paper. The main features of this packet scheduler development are the Quality of Service (QoS) and variable length packet support. The packet scheduler supports up to eight traffic classes which can be assigned up to two different priorities. The bandwidth assigned to any traffic class is configurable. The packet scheduler has been described and simulated in C++ language under uniform and bursty traffic conditions.
© (2007) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
R. Arteaga, F. Tobajas, R. Esper-Chaín, M. A. Monzón, R. Regidor, V. De Armas, and R. Sarmiento "Variable length packet scheduler algorithm with QoS support", Proc. SPIE 6590, VLSI Circuits and Systems III, 659012 (10 May 2007); https://doi.org/10.1117/12.721947
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KEYWORDS
Switches

Computer architecture

Global Positioning System

C++

Control systems

Lanthanum

Switching

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