An FPGA-based DS-CDMA multiuser demodulator employing adaptive multistage parallel interference cancellation

Xinhua Li; Zhenyu Song; Yongjie Zhan; Qiongzhi Wu

doi:10.1117/12.855172

2 April 2010 An FPGA-based DS-CDMA multiuser demodulator employing adaptive multistage parallel interference cancellation

Xinhua Li, Zhenyu Song, Yongjie Zhan, Qiongzhi Wu

Author Affiliations +

Proceedings Volume 7651, International Conference on Space Information Technology 2009; 76511G (2010) https://doi.org/10.1117/12.855172
Event: International Conference on Space Information Technology 2009, 2009, Beijing, China

Abstract

Since the system capacity is severely limited, reducing the multiple access interfere (MAI) is necessary in the multiuser direct-sequence code division multiple access (DS-CDMA) system which is used in the telecommunication terminals data-transferred link system. In this paper, we adopt an adaptive multistage parallel interference cancellation structure in the demodulator based on the least mean square (LMS) algorithm to eliminate the MAI on the basis of overviewing various of multiuser dectection schemes. Neither a training sequence nor a pilot signal is needed in the proposed scheme, and its implementation complexity can be greatly reduced by a LMS approximate algorithm. The algorithm and its FPGA implementation is then derived. Simulation results of the proposed adaptive PIC can outperform some of the existing interference cancellation methods in AWGN channels. The hardware setup of mutiuser demodulator is described, and the experimental results based on it demonstrate that the simulation results shows large performance gains over the conventional single-user demodulator.

Citation Download Citation

Xinhua Li, Zhenyu Song, Yongjie Zhan, and Qiongzhi Wu "An FPGA-based DS-CDMA multiuser demodulator employing adaptive multistage parallel interference cancellation", Proc. SPIE 7651, International Conference on Space Information Technology 2009, 76511G (2 April 2010); https://doi.org/10.1117/12.855172

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