About the Journal of Micro/Nanolithography, MEMS, and MOEMS

Editor-in-Chief
Burn J. Lin
TSMC, Ltd. Fab 12
No. 6, Li-Hsin Rd. 6
Science-Based Industrial Park
Hsin-Chu, Taiwan 300-77
Taiwan
886-3-666-5858
Fax 886 3563 7386
Email: burnlin@tsmc.com.tw

Editorial Board

ISSN: 1932-5150
E-ISSN: 1932-5134

The Journal of Micro/Nanolithography, MEMS, and MOEMS (JM3) publishes peer-reviewed papers on the development of lithographic, fabrication, packaging, and integration technologies necessary to address the future needs of the electronics, micro-opto-electro-mechanical (MEMS and MOEMS), and photonics industries. The scope is broad to facilitate synergy and interest between the communities served by the journal. The following topical areas will be covered in JM3:

The emphasis of this section is on the tools, processes, and materials associated with the lithography of structures that have submicrometer features. Key topics include optical lithography, emerging lithographic systems and techniques, resolution enhancement techniques, innovative illumination and aperture filtering schemes, anti-reflection coatings, optical proximity correction, CD control, alignment, defect reduction, yield improvement, resist technology and processing, metrology, inspection, binary and phase-shifting mask technology, and modeling.

The emphasis of this section is on technologies to shape three-dimensional structures leading to the fabrication of active and passive electronic, electromechanical, optoelectronic, and opto-electro-mechanical devices, as well as passive optical devices. Key topics include etching and patterning technologies, plating technologies, replication, surface micromachining, bulk micromachining, focused ion beam technologies, fabrication and lithography for three-dimensional systems, MEMS/MOEMS, and micro-optics.

The emphasis of this section is on core processes and technologies necessary for packaging and integration, with a focus on wafer-scale and other volume integration methods. Key topics include novel package design, modeling, enabling materials, interconnect technology, integration processes, wafer-scale packaging, three-dimensional packaging, active and passive alignment, alignment structures, microassembly, structural integrity, microcooling systems, as well as microsystem design and applications.

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