Mr. Jia-Syun Cai Profile

Jia-Syun Cai

at National Taiwan Univ

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Publications (2)

Proceedings Article | 10 April 2024 Presentation + Paper

A transistor sizing method for standard-cell optimization considering lithography effects

Jia-Syun Cai, Pin-Yuan Su, Chien-Lin Lee, Kuen-Yu Tsai

Proceedings Volume 12954, 129540C (2024) https://doi.org/10.1117/12.3012028

KEYWORDS: Transistors, Lithography, Optical proximity correction, Semiconducting wafers, Device simulation, Design rules, Field effect transistors, Extreme ultraviolet lithography

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Proceedings Article | 30 April 2023 Presentation

An improved transistor sizing method for standard-cell optimization

Pin-Yuan Su, Jia-Syun Cai, Chien-Lin Lee, Kuen-Yu Tsai

Proceedings Volume 12495, 1249512 (2023) https://doi.org/10.1117/12.2658706

KEYWORDS: Transistors, Standards development

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