Photosensitive polyimide is expected as a future interlayer dielectric material in LSI circuits. In this paper, we propose a new interlayer dielectric process using a positive photosensitive polyimide directly synthesized from aromatic dianhydride and aliphatic diamine by block-copolymerization. Photosensitive polyimide solution was prepared with N-methyl-2-pyrrolidone (NMP) solvent. A diazonaphthoquinone PC-5 was used as a photosensitizer. The thin film was spin-coated with changing polyimide concentration and rotation speed. The uniformity of the coated film was achieved less than +/- 0.9 % on a 3-inch wafer of silicon. A 0.5 micrometers line and space pattern was obtained by i-line lithography. The (gamma) value of the contrast was evaluated to 1.05. The dielectric constant of the base polyimide was measured for a thick film by the cavity perturbation method. The values from 2.4 to 3.0 were obtained within the frequency range from 1 GHz to 20 GHz. The break down voltage was measured to be 107 kV/mm without high-temperature heat treatment.
For enhancing operating speed of a superconducting integrated circuit (IC), the device size must be reduced into the submicron level. For this purpose, we have introduced electron beam (EB) direct writing technique into the fabrication process of a Nb/AlOx/Nb Josephson IC. A two-layer (PMMA/(alpha) M-CMS) resist method called the portable conformable mask (PCM) method was utilized for having a high aspect ratio. The electron cyclotron resonance (ECR) plasma etching technique was utilized. We have fabricated micron or submicron-size Nb/AlOx/Nb Josephson junctions, where the size of the junction was varied from 2 micrometer to 0.5 micrometer at 0.1 micrometer intervals. These junctions were designed for evaluating the spread of the junction critical current. We achieved minimum-to-maximum Ic spread of plus or minus 13% for 0.81-micrometer-square (plus or minus 16% for 0.67-micrometer-square) 100 junctions spreading in 130- micrometer-square area. The size deviation of 0.05 micrometer was estimated from the spread values. We have successfully demonstrated a small-scale logic IC with 0.9-micrometer-square junctions having a 50 4JL OR-gate chain, where 4JL means four junctions logic family. The circuit was designed for measuring the gate delay. We obtained a preliminary result of the OR- gate logic delay, where the minimum delay was 8.6 ps/gate.
We present the noise properties of a mixer with the NbN-MgO-NbN quasiparticle tunnel junctions. Our work is based on experiment in the 120-180 GHz range with the NbN tunnel junctions in the mixer. Mixer printed circuit is totally made of NbN. The mixer operates at 5.4 K temperature unacceptable with Nb junctions. The minimum DSB receiver noise temperature is about 65 K at 162 GHz and approaches the Nb SIS mixer performance in mm band. It has been found that the noise sources in the NbN junctions are comparable to the Nb junctions and that the receiver noise with the NbN SIS mixer may be only few times more than the quantum limit of noise in the frequency range below the gap frequency. Output noise of the SIS mixer has been found constant in a wide frequency band and within an important range of the local oscillator amplitudes.
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