For the current problem of small target detection, this paper first sorts out the development and current situation of target detection algorithms, and systematically summarizes the research progress of target detection algorithms on complex ground backgrounds. Secondly, we start with two major categories of hyperspectral small target detection and infrared small target detection, and each category is analyzed from different methods. Then we take the representative algorithm as an example to analyze its detection performance and its application under the actual complex ground background conditions. Finally, we respectively make prospects and predictions for each type of algorithm in the application of complex ground background target detection, which provides a reference for future research on small target detection problems.
KEYWORDS: Digital signal processing, Image processing, Field programmable gate arrays, Image restoration, Point spread functions, Deconvolution, Computing systems, Image deconvolution, Data processing, Parallel processing
Image restoration takes a crucial place in several important application domains. With the increasing of computation requirement as the algorithms become much more complexity, there has been a significant rise in the need for accelerating implementation. In this paper, we focus on an efficient real-time image processing system for blind iterative deconvolution method by means of the Richardson-Lucy (R-L) algorithm. We study the characteristics of algorithm, and an image restoration processing system based on the coordinated framework of FPGA and DSP (CoFD) is presented. Single precision floating-point processing units with small-scale cascade and special FFT/IFFT processing modules are adopted to guarantee the accuracy of the processing. Finally, Comparing experiments are done. The system could process a blurred image of 128×128 pixels within 32 milliseconds, and is up to three or four times faster than the traditional multi-DSPs systems.
KEYWORDS: Digital signal processing, Field programmable gate arrays, Image processing, Parallel processing, Signal processing, Data processing, Deconvolution, Detection and tracking algorithms, Image restoration, Point spread functions
In this paper, we present a co-design method for parallel image processing accelerator based on DSP and FPGA. DSP is
used as application and operation subsystem to execute the complex operations, and in which the algorithms are
resolving into commands. FPGA is used as co-processing subsystem for regular data-parallel processing, and operation
commands and image data are transmitted to FPGA for processing acceleration. A series of experiments have been
carried out, and up to a half or three quarter time is saved which supports that the proposed accelerator will consume less
time and get better performance than the traditional systems.
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