In this paper, we review key defectivity learning required to enable 7nm node and beyond technology. We will describe ongoing progress in addressing these challenges through track-based processes (coating, developer, baking), highlighting the limitations of common defect detection strategies and outlining methodologies necessary for accurate characterization and mitigation of blanket defectivity in EUV patterning stacks. We will further discuss defects related to pattern collapse and thinning of underlayer films. |
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CITATIONS
Cited by 5 scholarly publications.
Optical lithography
Extreme ultraviolet
Inspection
Coating
Scanning electron microscopy
Semiconducting wafers
Defect detection