2.1

Microbolometer implementation

Microbolometer are built in a monolithic way over completed readout circuit substrates thoroughly conventional microelectronics fabrication equipment (fig. 1). In a first step a thin aluminum reflective layer is deposited and delineated directly on top of the readout integrated circuit (ROIC). A 2.5 μm thick polyimide sacrificial layer is then spun and cured. A heavily doped amorphous layer silicon 0.1 μm thick is deposited over the polyimide layer and covered by 8 nm of titanium nitride by reactive plasma vapor deposition. Vias are opened by dry etching throughout the structure down to the ROIC pads, and metal deposition and etching achieves electrical continuity between the underlying substrate and active bolometric structures at the surface of polyimide. At this point electrode delineation is done by wet etching the titanium nitride layer selectively over the amorphous silicon. The pixel contour is then delineated and dry etched to the polyimide, and a final local polyimide etch over testing pads is carried out. At this stage the wafers are tested for standard automatic electrical functionality and acquisition of array parameters. Finally the microbridge arrays are released by polyimide removal in a conventional resist ashing equipment.

Fig. 1 :

Schematic of the process flow

2.2

Detector engineering and design

IR absorption is provided by controlling titanium nitride layer resistance. The quarter-wavelength effect between the microbridge electrodes and the reflector roughly causes the response to peak in the 8 to 14 μm range. Amorphous silicon does not contribute much to optical absorption, except in parasitic interference effects. These effects tend to notch the spectral response due to the high refractive index of silicon. Thin layers (0.1 μm or less) are therefore preferred. These arrangements, combined with general 1.5 μm design rules, lead to a spectral band absorption by fill factor product of about 60%.

Thermal resistance is achieved by four thin legs per pixel, anchored to the substrate by metal studs formed by the metallized vias. At first, we developed structures with only two legs to sustain the amorphous silicon membrane. These structures provided the adequate thermal resistance but were not mechanically reliable : microbridges tended to stick to the substrate when electrically activated. This problem was solved by the four leg designs, as represented in the SEM view in Fig. 2. Thermal resistance loss due to doubling the number of anchoring points has been compensated, or even improved, by design rule shrink. Four 1.25 μm wide, 0.1 μm thick (neglecting titanium nitride), 12 μm long legs lead to a global 1.5 10⁷ K/W thermal insulation given the low thermal conductance of amorphous silicon. The highest levels of doping of the amorphous silicon thermometer have demonstrated the best results in terms of signal-to-noise ratio. Furthermore, these materials are easier to control in terms of deposition kinetics, uniformity and resistivity than less doped ones. Typical 120 Ω.cm and 2.4 %/K TCR (at room temperature) amorphous silicon is routinely obtained with standard deposition equipment and in-house developed processes. Fig. 3 shows the stability of the amorphous silicon resistivity in the different runs we processed.

Fig. 2 :

SEM view of a pixel with four legs

Fig. 3 :

Average resistivity of amorphous silicon across a 4” wafer

These results prove the reliability of our deposition control for the thermometer. A good uniformity (std.dev./mean) of less than 7 % is routinely achieved on each technological run associated with a spatial uniformity (std.dev./mean) better than 3% across each 4” wafer. Fig. 4 shows the TCR behavior of the amorphous silicon layer from batch to batch. Material with a low excess of low frequency noise and without random telegraph switching (RTS) noise is obtained by controlling the deposition. The contacts between the electrodes and the amorphous silicon are ohmic, thus reducing fluctuation in the dynamic resistance of the detector and also avoiding excess contact noise.

Fig. 4 :

Process control chart for the average TCR of amorphous silicon across a 4” wafer

2.3

Readout circuit and modeling

The readout circuit for microbolometer array is a key point to access a high level of performance. The main difficulty is to extract a signal from an important background and photonic current is typically les than 0,5 % of the total current flowing through the microbolometer. This behavior is similar to quantum detectors one used at high temperature and sophisticated mean to suppress the background current has to be used without adding additional noise. The pixel implementation is presented in

Fig. 5. Each detector Rd is coupled with a direct current injection in transistor Md. Both continuous and pulsed supply modes are possible. In continuous mode, the SR switch is “on” during integration. When the row is not addressed by the row multiplexer, the bolometers are still biased by SB switches in the “on” state. In pulsed mode, the bolometer is powered by SR uniquely during integration time. The SB switch is never “on”. Most of the background current is suppressed using one or more blind bolometer Rb for each column. The useful current from the bolometer is then integrated in a capacitive trans-impedance amplifier (CTIA) at the bottom of the column.

Fig. 5 :

Pixel configuration

The 2D arrangement of the matrix needs a multiplexer circuit to select individual pixels. The 320 × 240 IRFPA configuration is shown in Fig.6. The FPA is read on a row by row basis.

Fig. 6 :

Implementation of readout IC array

Along with the readout circuit, we have developed a model to determine precisely the performance of its component under any conditions. This model helps orientation of the technological development, tuning the current circuit to get optimum performance and also helps in the design of new optimized architectures and application specific readout circuits. This model has been fully validated on a previous test chip.

The physical phenomena taken into account in the model are the following :

The equations we present below cover the circuits based on bolometer voltage polarization.

The bolometer acts as a thermal RC filter shown in Fig. 7. It is controlled by the following differential equation :

Fig. 7 :

Bolometer model

where θ is the temperature difference T-To between the bolometer and the readout circuit and Rth and Cth are the thermal resistance and thermal capacitor respectively. Pjoule is the electrical power dissipation and Pir the absorbed infrared power.

The signal-to-noise ratio is the criterion to maximize to achieve the best detector performance. To calculate this ratio, we integrate the noise current spectral density in the readout circuit bandwidth (which depends on the integration time). Our model, detailed elsewhere[VEDE 99], leads to the following curves (Fig. 8) which show the evolution of the signal-to-noise ratio with electrical power dissipation in the bolometer in both pulsed and continuous mode. In reference paper [3], we demonstrated the dependence of the responsivity and the 1/f noise on bias voltage. From these equations, signal-to-noise ration (s/n) can be evaluated with bias voltage level, and a saturation of s/n appears with high values of bias power dissipation.

Fig. 8 :

Evolution of the signal-to-noise ratio with electrical power dissipation

As can be seen, both modes lead roughly to the same performance limited by 1/f noise. To reach this performance, polarization must be higher in the pulsed mode.

The pulsed mode, however, has many significant advantages. Consumption in the detector is reduced as the detectors are only polarized during the integration phase. This is obviously a key point in the design of portable systems for which battery weight and autonomy are critical. The pulsed polarization also reduces the component vulnerability and preserves the intrinsic time constant of the detector (4 ms). This time constant is suitable with 30, 60 and even 120 Hz frame rate imagery. The remanence associated is respectively –80 dB, -40 dB and –20 dB enabling, for example, the use of micro scanning techniques. Finally, the pulsed mode presents a reduced sensibility to focal plane temperature fluctuations because the blind bolometer allows a better compensation for focal plane temperature fluctuation since its temperature is almost the same as the active pixel one. The electro-optical performance achieved is summarized in the following paragraph.

4.1

Temperature environment

The effect of temperature on amorphous silicon (a-Si:H) properties is now well known and the first metastable effect found and the most widely studied is the creation of defects by prolonged illumination of absorbing light. This was discovered in 1977 and is the cause of the slow degradation of solar cells as they are exposed to sunlight (Staebler and Wronski)[STRE 91]. Thermal treatment impacts also on conductivity properties, on this is our concern for microbolometer application. Our first electrical characterization of amorphous silicon bolometer shows that resistance may evolve of 30% at nominal temperature after specific distressing at 80°C temperature or less. This phenomena is of course a major drawback for a system manufacturer who designs a proximity electronic with specific bias perfectly suited to the detector resistance. This evolution comes from well known metastability behavior of amorphous silicon (fig. 12).

Fig. 12 :

Equilibrium diagram

Amorphous silicon structure is schematically described by two possible states : One stable and the other one metastable. These two states are separated by a potential barrier which delays equilibrium state regime. The barrier height corresponds to activation energy of relaxing phenomena. We determine two behaviors of our amorphous silicon versus temperature with an experimental approach. Above a temperature called equilibrium temperature the material is instantaneously at thermodynamic equilibrium. Under this equilibrium temperature, the material can be out of equilibrium and a relaxation occurs. In consequence, in order to reach an equilibrium state we must first heat the sample at a temperature over the equilibrium point and immediately cooled with a slow cooling rate down to ambient temperature. Equilibrium temperature is a key parameter for amorphous silicon, this figure of merit reflects the stability of bolometer material. This equilibrium temperature T_E is experimentally determined from the following figure where conductivity measurements are plotted versus temperature for fast cooling rate and slow cooling rate (fig. 13).

Fig. 13 :

Temperature dependence of conductivity of a-Si:H after annealing and cooling at different rates

Fig. 13 highlights the very high equilibrium temperature (180 °C) obtained on our material compared to standard amorphous silicon which is usually in the range of 90°C. This high equilibrium temperature opens up all kinds of applications with severe thermal constraints because the high margin with respect to the storage temperature conditions is large. This high equilibrium temperature is the first step to obtain high device reliability. The second step is to put the material in the stable state.

Mastering the kinetic cooling rate is one possible method to control the material state and we have developed a specific process to ensure that our material stays at thermodynamic equilibrium while detector temperature stays below equilibrium temperature. We investigated experimental thermal treatment to evaluate the impact of storage condition for detector during a long time. To be representative of these adverse conditions we set as a first goal the following conditions :

First results obtained on samples with low cooling rate are illustrated on fig. 14 where microbolometer resistance is plotted versus storage time at 125°C.

Figure 14 :

Stability of bolometer resistance at 125°C for 1000 hours

These first results on LETI/LIR material exhibit a high stability at a temperature compatible with most of system specifications. Moreover, this behavior is an advantage for long package out gassing during vacuum integration of microbolometer focal plane array[SHIE 98]. This first development is very promising and a larger experimental protocol is underway.

Reliability is extremely stringent for automotive or spatial operating conditions. Among thermometer candidates in microbolometer development, amorphous silicon is well positioned with its silicon technology compatibility, the absence of phase transition and the possible long storage at high temperature. All this experimental work was carried out on bolometer detector without CMOS readout in order to measure a huge number of devices. An experimental campaign on 320×240 microbolometer devices is under progress.

4.2

Mechanical environment

Suspended structure like microbolometer membrane could let expected mechanical susceptibility to vibration or shock solicitation. Due to very low suspended mass (< 0.5 10^-9 g) and the short leg length (10 μm) the mechanical strength of the structure is very high and sustains vibration and shock environment encountered in different applications.