This PDF file contains the front matter associated with SPIE Proceedings Volume 11518, including the Title Page, Copyright information, and Table of Contents.

To enable failure-free process windows with EUV lithography a sufficiently high optical contrast is required. For decreasing pitch the contrast requirements may only be achieved with advanced masks such as, high-k and attenuated PSM. While manufacturing high-k absorbers requires effort, the imaging theory is straightforward. Studies to the PSM have shown even better image contrast, at the cost of increased complexity of the imaging theory. The strong presence of M3D effects with EUV drives the attenuated PSM imaging physics in a different direction than for DUV. We report on the investigation of the expected requirements and capabilities of the PSM

Scaling trends in the semiconductor industry towards smaller technology nodes and feature sizes are continuing and first consumer products manufactured with the help of EUV technology are already on the market. Major industrial players have introduced EUV lithography into their production at the 7nm technology node and with the 5nm node being on its way [1], the amount of EUV lithographic layers is expected to rise significantly and implementation of EUV double patterning is anticipated. These developments lead to more strict technological requirements especially for the corresponding EUV but also for the used high-end DUV photomasks in terms of minimum feature sizes and acceptable Edge Placement Errors (EPE). Moreover, photomask defectivity increases dramatically with shrinking feature sizes. This creates significant challenges to the industry, as in particular the most cost intensive EUV photomasks possess the highest numbers of defects. The current industry standard for high-end photomask repair tools is the MeRiT neXT [2]. To face the upcoming challenges an efficient and reliable way to repair future high-end photomasks is inevitable. A corresponding repair tool must address decreased minimum feature sizes and increased pattern complexity on high-end photomasks. In this paper we present our latest results of high-end EUV repairs carried out on the next generation photomask repair tool MeRiT LE. The tool shows improved system dynamics, makes use of a new electron beam column, which operates at a low electron beam voltage down to 400V and enables the repair of next generation ultra-small defects.

This publication is a continuation of a prior work on the process space available for the repair and localized cleaning of extreme ultraviolet lithography (EUVL) photomasks with the fpIII femto-pulsed deep ultraviolet (UV) repair tool. This next phase of work was done in partnership with the Paul Scherrer Institute (PSI) to provide a more systematic examination of the process space. In these tests, specialized cells were produced to systematically test the effect of variations in the fpIII laser parameters with both carbon and HSQ (hydrogen silsesquioxane) absorber material pin dots on multilayer fields, according to design of experiments (DOE) methodology. Blank (no pin dot) test cells and pin dots were inspected both with nmVI AFM and PSI RESCAN EUV-actinic lensless metrology before and after laser processing. This data was then analyzed with full-factorial DOE, and less structured techniques, to provide insights into the capability of a modelled optimal fpIII laser process.

This paper covers the writing performance of our multi-beam mask writer, MBM-1000, which has been developed for the 5 nm technology node. It exposes low sensitivity resist faster than VSB writers and prints complex patterns with better fidelity. We will describe its writing performance and compare it with our VSB writer, EBM-9500 PLUS. MBM-1000 has pixel-level dose correction (PLDC). PLDC modulates dose profile at pixel level to improve pattern fidelity and patterning resolution. It is integrated with MBM-1000 data path and runs inline. We will also report functions and writing results of MBM-1000 with PLDC.

Even with the increasing need for next-generation lithography, ArF lithography is still applied to the majority of critical layers. However, as wafer design shrinks, conventional 6% phase shift mask (PSM) becomes unable to sufficiently meet the lithography requirements for dense dot pattern compared to dense line pattern. To enhance ArF lithographic performances for dot pattern, high-transmission phase shift mask (High-T PSM) is attracting attention because the transmission of PSM has a significant impact on lithographic performances[1-4]. From the evaluation results of transmission dependency by mask 3D simulation, it was found that 30% transmission has the best lithographic performances for dot pattern. Based on these results, mask blank and mask making process for the new 30% PSM were developed. The result showed good cross-section profile, mask pattern resolution and defect repairability. In addition, the durability against chemical cleaning and ArF irradiation were also improved. Wafer printability test using negative tone development demonstrated that new PSM has advantages in process window and MEEF for dense dots (holes on wafer). Finally, the potential for further application of new 30% PSM was investigated by mask 3D simulation. The results showed that new 30% PSM has lithographic benefits not only for dense dots but also for other patterns. The new 30% PSM is a strong candidate capable of enhancing ArF lithographic performances for 5nm node or hp 1Xnm and beyond.

Nanomachining is one of the primary repair processes for leading-edge technology photomasks. Many hardware improvements have been made in successive nanomachining-tool generations to improve repair performance specifications (stability, drift, and z-depth control). However, improvement to the repair processes are still needed to address the use of the latest generation of high aspect-ratio (HAR) NanoBitsTM (1.8 AR and above). Although beneficial for repair of leading-edge photomasks, HAR NanoBitsTM exhibit greater degrees of nonlinear deflection, wear, and even breakage during traditional repair processes. In this work, the authors chronicle investigations into new nanomachining process options to enable subtractive hard defect repair with HAR NanoBitsTM down to the most advanced technology node with topographic z-depth control within ±0.5 nm and no detectable line edge, or multilayer capping layer, roughness.

The transistors have been miniaturized to increase their integration. With the miniaturization, the thickness of resist has been decreased to prevent them from collapsing. In this study, the resist thickness dependence of the pattern formation of a chemically amplified electron beam resist was investigated. The line width roughness (LWR) of resist patterns increased with the decrease of initial resist film thickness. It was found that the dissolution kinetics depended on the initial resist film thickness. The escape of low-energy electrons to the substrates is considered to have resulted in the difference in the dissolution kinetics and LWR

Captive and merchant mask makers participated in an anonymous survey in the summer of 2020, despite the challenges of the global COVID-19 pandemic, to capture the profile of the mask industry for the period of July 2019 through June 2020. The eBeam Initiative’s sixth Mask Makers Survey in 2020 covers a number of questions related to the profile of the mask industry, from overall number of masks to pattern generation type. The survey respondents – 10 different captive and merchant photomask manufacturers versus those who participated in last year’s survey – reported 558,834 masks this year. Among the results of the Mask Makers survey, the number of masks written with multi-beam writers more than doubled versus last year’s survey, while the average mask write time reported using multi-beam writers (which was recorded for the first time in this year’s survey) was 12.14 hours. In addition, EUV mask yield was reported at 91 percent. The use of mask process correction (MPC) increased at leading-edge ground rules (nearly tripling for sub- 16-nm ground rules). The eBeam Initiative also conducts an annual survey of industry luminaries which can be found at www.ebeam.org.

We present SMILE, an open source software for the characterization of line and space patterns in SEM images. SMILE has been developed to provide a metrology platform which is open-source and, as such, easy to customize to specific needs and simple to integrate into a chain of analysis. SMILE is used to measure CD, LWR and unbiased LWR. The software is currently available as MATLAB code and under development for open platforms such as Python or Octave. Here we describe the main features of the software, its structure and the algorithms used to perform line edge detection, LWR calculation and LWR unbiasing.

An essential element of sub-15 nm nanoimprint lithography is to create fine patterns on a template. However, it is challenging to create sub-15 nm half-pitch patterns on a template by direct drawing with a resist, owing to poor resolution and low sensitivity. We are currently researching the development of sub-15 nm half-pitch patterns by applying self-aligned double patterning on a template. The defect density of the template has not yet reached a high-volume manufacturing level. The aim of our study is to achieve a defect density of less than 1 pcs/cm² for sub-15 nm templates. To achieve this, we need to overcome stochastics-induced resist defects. We aim to determine the mechanism of defect formation by observing the details of the defects. We challenged resist-pattern inspections using a grazing-incidence coherent scatterometry microscope, which illuminated an extreme ultraviolet light to the resist pattern and detected the diffraction signal from the pattern. This study was conducted in collaboration with University of Hyogo and Kioxia Corporation. In this paper, we present the results of damage evaluations and resist-pattern inspections.

Deep neural networks (DNN) have shown excellent performance in classification and regression problems in multiple fields. Recent work has demonstrated the use of deep learning techniques for modeling mask processes (MILAN) where it greatly reduces the time and effort to build an accurate model [1]. Models used in semiconductor fabrication have rigorous requirements about generalization and users need to be aware of potential gaps in the model. It is therefore imperative that we can detect when a deep learning process model is not able to generalize on unseen data. We discuss an approach to solve this problem using variational autoencoders [2] in this paper. Variational autoencoders (VAE) are generative models that compute a probability distribution for describing an observation in the latent space of the model [3]. Therefore, any input to the model can be described in terms of probability distributions of its latent variables. We leverage this property of VAEs to augment MILAN models to determine their robustness. We also present results of the latent space distribution on unseen data when the deep learning model fails to generalize. The results show that our approach provides us with an ability to indicate vulnerabilities in deep neural network models used for mask manufacture proposed.

As fabs continue their effort to sustain Moore’s Law and manufacture smaller and more complex features in lithographic masks, Mask Process Correction (MPC) becomes increasingly more relevant. An indispensable part of MPC is the ability to accurately predict the outcome of the printed mask. Machine learning beckons the possibility that lithographic masks can be modeled in an automated flow requiring little or no manual intervention. While some significant progress has been made towards this goal, it is important to come to terms with the two main items that impact the outcome of a modeling approach based on supervised Deep Learning: the first is the architecture of the model and its related internal settings (number of layers, activation function, etc.) and the second being the choice and quality of the input data used for training and validating the Deep Learning model which will thoroughly presented in this paper. The study focuses primarily on simulated SEM images of regular structures (e.g., lines and spaces, contact arrays) to allow full control on the quality of the input data as well as determine the ground truth with a very high degree of accuracy and presenting a comparison with the real data.

Patterned masks require requalification at wafer fabrication plants. Periodic inspections are done at the wafer fab to identify any new defects, such as haze and contamination, which develop or get added on the mask due to their usage and the way they are handled. These defects, if not monitored over time, may result in mask defects that print on the wafer. It is thus mandatory to identify and fix them in their early stages. Repeated inspections, coupled with higher sensitivity inspections employed at wafer fabs, result in a large number of defects reported, which includes many small and faint defects. However, some of these small and faint defects need detailed operator review time, due to their potential to grow and have a larger impact later. Efficiency of classification includes both speed and accuracy. For a manual review, accuracy is primarily affected by consistency, arising due to the bulk and monotonous nature of classification task affected by human fatigue. The requirement for higher accuracy however, necessitates increased operator review and analysis time. Increased operator review time translates to the amount of time a mask in not used for printing wafers, i.e. productivity loss. Calibre® DefectClassify™ tool enables automatic classification of defects by employing stable algorithms to ensure consistency and accuracy, while algorithm efficiency ensures adequate speed. The tool thus aids in improving the throughput and yield at wafer fabs. The tool reads defect images, analyzes image properties to extract potential defect regions, processes the regions to identify actual defects and classifies them. This paper mainly focuses on the challenges faced in characterization and classification of defects from images reported by the inspection machine. The primary difference between analyzing inspections at wafer fab and mask shop is the availability of layout data. Unavailability of layout data complicates the tasks of identifying different pattern regions on the mask, especially assist features. With advanced technology nodes, the number of assist features present is higher while the features themselves get smaller in size. These features, if not identified correctly, may be mistaken as defects. Other than that, single die defects are a category that gets affected due to lack of layout information. Without a reference to compare with, these defects require separate sets of rules to be applied to images for their identification and classification. In particular, identification of defects on pattern edges and corners from single die images is challenging without a reference image.

Thin mask model has been conventionally used in optical lithography simulation. In this model the diffracted waves from the mask are assumed to be Fourier transform of the mask pattern. This assumption is the basis of Hopkins' method and sum of coherent system model. In EUV (Extreme UltraViolet) lithography thin mask model is not valid because the absorber thickness is comparable to the mask pattern size. Fourier transformation cannot be applied to calculate the diffracted waves from thick masks. Rigorous electromagnetic simulations such as finite-difference time-domain method, rigorous coupled wave analysis and 3D waveguide method are used to calculate the diffracted waves from EUV masks. However, these simulations are highly time consuming. We reduce the calculation time by adapting a convolutional neural network. We construct a convolutional network which can predict the diffracted waves from 1D EUV mask patterns. We extend the TCC method to include the off-axis mask 3D effects. Our model is applicable to arbitrary source shapes and defocus.

Since the advent of EUV into high volume manufacturing at the 7 nm node, the role played by EUV materials in the photomask and optics for long term sustainability is considered. This presentation examines current and future choices for materials in the photomask and optics. More flexible high NA design, tolerance to defects, longer lifetimes, 3D shadow mask effect are factors which drive new choices in materials. Given the trade-offs required, new possibilities in materials are proposed which are holistically considered solutions to the challenges presented by next generation manufacturing.

Advanced DRAM technology relies heavily on 193nm immersion lithography. Negative tone develop (NTD) layers are becoming increasingly important particularly in nodes below 20nm. NTD is particularly useful for patterning holes on the wafer. Cut layers for multi-patterning (MP) applications and bit line contact structures are common uses of NTD in DRAM. Patterning these structures pose lithographic challenges around process window (PW), layer-to-layer overlay, and critical dimension (CD) control. The mask plays a critical role in optimizing all of these attributes. In this paper, we explore multiple mask enhancements to optimize wafer performance for NTD contacts. These include mask process and mask blank conditions, as well as a data enhancement technique generally known as mask process correction (MPC). Specifically, we implement a litho-aware MPC Application (LAMA) to optimize mask pattern fidelity. Finally, we harmonize these mask enhancements with optimizations to wafer exposure conditions and optical proximity correction (OPC) to demonstrate capability improvement in NTD contact lithography.

In the early stage of technology node definition and process development, design house owns abundant logic patterns resources and is able to offer fab more potential hotspots to do process window check, accelerating design rule qualification, feedback and optimization. A systematic methodology has been put forward to detect potential hotspots categories and modify related design rules with very insufficient process information for fabless side. It is efficient to conduct the study on a small number of patterns which can be treated as the typical of the whole physical design. Hence the physical design can be managed as a library and grouped by specific pattern signature for every layer. Based on the connectivity of source drain layers and local-interconnect layers, via0, under the first metal layer, is adopted litho-etch (LE) x4 on 193i scanner as the lithography solution. The experiment is carried out on the via0 layer. With consideration of minimum size and multiple limitations of other layers in design rule, systematic pattern analysis, fuzzy pattern search for low NILS, high MEEF and large PV bands have been combined to optimize the related design rules.

MPC computation time is basically in proportional to the number of vertices in the layout. ILT free form may have up to 15 times more vertices than conventional OPC output, which may lead to the ballooning of MPC processing time. Novel data simplification technique for ILT input has been developed. Simulation based verification will be presented.

Mask-shops developing advanced reticles for use in high-volume semiconductor manufacturing generate an abundance of critical data. Most of this data is generated in the backend of the mask production line where critical dimensions (CDs), registration and defect inspections are performed, and the general emphasis of this data collection is to confirm that the mask meets certain required specifications. Some of the results gathered are also used to monitor the front-end of line processing steps like mask write, develop, etch and clean. However, with most data being disparate and staying local to the tools where they were gathered, very little gets used beyond the immediate need to disposition the mask for shipment. This extensive data, when effectively stored and analyzed, helps not only accelerate time-to-results for mask disposition but also substantially improve monitoring of the frontend process and root-cause analyses. This paper discusses requirements for an effective data management system (DMS) capable of centralizing all maskshop data. This involves not only centralizing blank and pattern defect inspection results and the associated review SEM, repair, and AIMS^TM disposition data but also CD, registration and other metrology data collected. The DMS architecture needs to support connectivity and use of data from other databases in the maskshop which include production tracking, computational application results, tool and fab environment logs, etc. After centralizing the data and establishing linkage to other databases, the system needs to provide visualizations through user-interfaces and advanced analytics that are easy for use by both production and engineering. The paper introduces the new KlearView^TM mask DMS system from KLA and discusses it’s features and deployment into advanced mask manufacturing. While quintessential to maskshop operations, the DMS also serves as a bridge to reticle requalification and wafer inspection and metrology data critical to improving mask quality and qualification necessary for achieving optimal EUV lithography cost-of-ownership.

Generating curvilinear mask shapes in OPC instead of pure rectangular shapes is becoming more and more realistic as a method for improving wafer lithography performance. The main benefit of using curvilinear shapes is an improved process window, meaning that the wafer image is less sensitive to dose and focus conditions during the exposure. With the increased compute power of latest High-Performance-Clusters (HPC) and the availability of Multi-Beam-Mask-Writers (MBMW) those wafer lithography benefits can be realized at technology nodes currently being developed. A very practical challenge for putting masks with curvilinear shapes in production is the availability of reliable Mask- Rule-Checks (MRC). The OPC engine not only needs to generate shapes which are manufacturable, the mask shop also needs a method of verifying that incoming mask data is manufacturable. For curvilinear mask shapes this is more challenging than for rectangular mask shapes, since simple width and space checks as used for rectangular masks are not sufficient anymore. In this paper, a comprehensive set of MRC limits is being discussed and the effectiveness of an MRC engine operating on curvilinear input data is demonstrated. Rules used here include minimum width of exposed features, minimum space between exposed features, minimum curvature of convex and concave shapes, as well as minimum area of exposed features.

Silicon photonics is becoming a significant platform in high-bandwidth, low power device applications for HPC and cloud computing infrastructure. Its continuing push to displace incumbent copper and VCSEL technologies depends on the scaling potential of existing CMOS manufacturing processes. Central to this process is still the photomask, and its’ ability to accurately render design intent. However, processes and quality metrics that have been developed for electronics-centric photomasks do not translate directly to the needs of photonics-centric photomasks. This may lead to unconventional or non-intuitive choices for data rendering (fracture), mask pattern tooling (laser vs e-beam). Standard metrology (CD Uniformity, Localized LER) may not capture the essential elements that correlate mask pattern fidelity with waveguide signal loss. There are likely limits to a “blind translation” of IC-centric metrics to photonics-centric metrics. This paper will report on a collaborative effort to compare several photomask manufacturing approaches and their impact on photonics device performance (signal loss) for a common set of device structures. We will also explore the standard metrics applied to photomask quality and determine whether they correlate to waveguide performance, or whether different metrology approaches are required for vetting photonics-centric photomasks.

In this presentation we introduce photolithography for Flat Panel Display. The conventional problem for large-size photomask blanks is uniformity. For a large area, it is really difficult to improve substrate flatness and PSM transmittance/phase shifting angle uniformity. In this presentation we introduce our “Super Flat Mask (SFM) series” that have excellent flatness over G10 area. We also introduce our Att-Phase Shift film over G10 area. These films have uniform optical characteristics and nearly orthogonal cross section after etching. Along with very flat substrates, these films contribute well to production of high resolution panels.

Maskless lithography is versatile and suitable for demonstrators covering a large field of applications for advanced devices. Hybrid lithography is a technique reducing significantly writing time by coupling an e-beam tool and a mask-based DUV optical tool. This novel approach involves two consecutive exposures using a unique e-beam resist following by a single development step, unlike complex “mix-and-match” multiple patterning strategies. Besides the matching of e-beam resist sensitivity to both e-beam/DUV exposures, we demonstrate high-resolution capability of CAR resists down to 30nm, while reducing writing time by a factor of 6 by using the hybrid approach. The overlay (OVL) performance between these 2 lithography steps and towards the previous levels meets also the alignment requirements and capabilities.

For nanoimprint lithography, computational technologies are still being developed. In this paper, we introduce a new NIL process simulator which simulates the whole imprinting process, and evaluates the quality of the resulting resist film. To overcome the scale difference of each component of the system, which makes it difficult to calculate the process with conventional fluid structure interaction simulators, our simulator utilizes analytically integrated expressions which reduce the dimensions of the calculation region. Additionally, we report on the critical dimension uniformity of sub-20nm contact holes as a demonstration of pattern robustness and discuss advancements made in defectivity, throughput and overlay.

In advanced semiconductor memory manufacturing, mask and lithography are critical for patterning. In this paper we jointly study the benefits of a full-chip, curvilinear, stitchless inverse lithography technology (ILT) with mask-wafer cooptimization (MWCO) for memory applications. The full-chip ILT technology employed in this study, first demonstrated in a paper presented at the 2019 SPIE Photomask Technology Conference[20], produces curvilinear ILT mask patterns without stitching errors, and with process windows enlarged by over 100% compared to the OPC process of record. At the 2020 SPIE Advanced Lithography conference, a new method was introduced, in which mask-wafer cooptimization (MWCO) is performed during ILT optimization[22]. This new approach enables curvilinear ILT for 193i masks to be written on variable-shaped beam (VSB) mask writers within a practical, 12-hour time frame, while also producing the largest process windows. This new study presents the mask and wafer results using MWCO. Curvilinear ILT mask patterns written by VSB mask writer and the corresponding 193i process wafer prints are shown. Evaluations of mask write times, and mask quality in terms of CD uniformity and process windows are also presented.

Actinic EUV mask metrology is essentially needed for EUV lithography in the semiconductor device manufacturing process. At PSI, we are developing RESCAN, a coherent diffractive imaging (CDI)-based platform that can meet current and future mask inspection resolution requirements. In CDI, the diffraction patterns obtained by illuminating the sample with coherent light are recorded by a pixel detector, and these are used to reconstruct the complex-amplitude image of an object through an iterative phase retrieval algorithm. While in a conventional optical system, aberrations can compromise the final image's resolution, the CDI approach is inherently aberration-free. Nevertheless, a careful preprocessing of the diffraction signal is necessary to avoid artifacts in the reconstructed image. In particular, since our system works in reflection mode with an angle of incidence of 6° and uses a flat detector, it is necessary to correct the recorded diffraction patterns that are conically distorted due to the non-telecentricity. This paper discusses the impact of the diffraction data preprocessing on the reconstructed image quality and demonstrates the defect sensitivity improvement by applying an optimized data preprocessing pipeline in the RESCAN microscope. As a result, we achieve defect sensitivity down to 20 nm on the photomask and uniform image quality in a large field-of-view.

EUV phase shifting masks may be introduced at the N3 node as alternative to double patterning or high-NA exposures. To be advantageous, phase shifting masks may have to come with phase different than 180° and high transmission. The main concern is how such exposures could be affected by stochastic side-lobe printing. In this paper, we present a simulation study where we compare stochastic distributions for contact layers with different mask approaches: binary mask, phase shifting mask with and without assist features, and TriTone masks. The purpose of this work is to evaluate whether phase shifting masks in EUV lithography may become a valuable option to further extend single exposure EUV at NA = 0.33.

This paper introduces a simple physical model to quantitatively explain resist surface charge effect observed in EBM- 9500PLUS, our latest VSB mask writer designed for 7 nm+ generation. The model takes into account secondary electrons drawn to resist surface by an already-existing surface charge, and vertical diffusion of positive charge from resist surface to inner resist. In order to verify the model, we experimentally evaluated the surface charge densities after beam exposure on resists of different thickness (from 80 nm to 300 nm) and different dose sensitivities (from 7 μC/cm² to 100 μC/cm²). The introduced model successfully reproduced the exposure-dose-dependent and time-dependent behaviors of those surface charge densities experimentally obtained. The model enables us to predict the amount of surface charge, and serves as one of the barometers to select the preferable resist thickness and its dose sensitivity under the pattern density and the required IP accuracy for the given product layouts. Furthermore, although the mechanism of charging had been unclear for a decade or more, the model finally provides a quantitative physical validity of our charge effect correction (CEC) system.

Nanoimprint lithography (NIL) is one of the highest potential candidates for next generation lithography (NGL) in semiconductors. NIL is very useful technology for fine pattern fabrications compared to conventional optical lithography. NIL technology makes use of replication from quartz templates. The cross-sectional profile of the template is directly transferred to the resist profile on a wafer. In relationship to that, the management of cross-sectional profile in quartz templates is needed much more than that of photomask. In our past reports, we had studied the performance of measuring cross-sectional profiles using grazing-incidence small-angle X-ray scattering (GISAXS). GISAXS has made it possible to analyze the periodic nanostructure patterns using 2D scattering X-ray intensity distribution. After much research we had found the application to not only sub-20nm hp lines-and-spaces(LS) patterns but also hole patterns was very effective. We have been developing templates for more scaling, “sub-15nm” by applying Self-Aligned Double Patterning (SADP). We showed the specific issues in SADP and the solution for quality assuranc In this report, we demonstrate the capabilities of measuring the cross-sectional profiles for sub-15 nm patterns using GISAXS. Taking into complicated periodic structures of SADP, we optimize the structural models to meet the demands. This report reveals GISAXS technique has potential for the sub-15nm metrology.

Nanomachining is typically described as being a material-independent subtractive mask repair process. This is a correct statement, for the most part, since it does not require a material end-stop nor chemistries targeted to remove only a specific material. However, it is not true when considering the effect of materials being removed on the integrity of the nanomachining tip (also referred to here as NanoBitsTM). While many advanced absorber materials such as OMOG are easier to nanomachine than earlier absorber materials such as chrome and MoSi, the absorbers used in EUV have proven to be much harder and tougher (in a nanomechanical sense) while sitting atop a very fragile multilayer substrate. This work shows results from advancements on the latest nanomachining platform, nm-VI to minimize tip wear during the repair process. Consequently, this improves defect repair capability for smaller dimensions, decreases overhead from tip changeouts, decreases the cost of consumables by increasing NanoBit lifetime, and increases repair tool return-on-investment.

Over the past few years, we have spent quite some effort to demonstrate that the off-line mask-to-mask overlay as determined on the PROVE tool correlates very well with the on-wafer overlay as measured by the scanner. The role and placement of the reticle alignment marks was considered in this analysis together with the reticle alignment model. The excellent correlation (R2 < 0.96) could only be achieved by a carefully set-up experiment. All potentially disturbing additional overlay contributors were ruled out. By doing so, a one-to-one comparison between the off-line determined mask-to-mask overlay and the on-wafer measured overlay could be made. This means that the mask-to-mask overlay as measured by PROVE directly translates into an on-product overlay contribution. The residual mismatch of ~ 0.6-nm could be attributed to the scanner itself and the sampling difference between a PROVE measurement and that of the alignment sensor inside the scanner. In this follow-up work, we will make a start to apply the knowledge that was obtained previously to a use-case that is much closer to what is common practice in the industry. An N7 equivalent technology process has been selected in combination with a state-of-the-art mask. This mask was made on an EBM-9000 system and contains μ-DBO (Diffraction Based Overlay) targets that can be readout on an ASML Yieldstar (YS:375) overlay metrology tool. Moreover, the mask contains electrical-test structures and random logic features. This makes it possible to study the onproduct overlay performance from the exposure field level down to a single logic feature on the mask! The mask is not the only contributor to the on-product overlay. Other on-product overlay contributors may be present as well. The current investigation aims to understand the on-product overlay performance by identifying the underlying contributors. This is done by considering the overlay as measured on the μ-DBO targets. The mask writing, etch, scanner, and metrology contributions are being addressed. We show that the mask contribution as part of the on-product overlay budget is comparable with the overlay performance of the state-of-the-art scanner ASML NXT:2000i (≤ 1.4-nm single machine overlay, dedicated chuck, full wafer coverage) that was used in this work. The goal of this paper is to set and understand the baseline for the intra-field on-product overlay performance as measured on YS overlay targets including all its sub-contributors. This enables us to make the next step towards local placement errors for individual device structures.

Sub-nanometer accuracy attainable with electron micrograph SEM images is the only way to “see” well enough for the mask analysis needed in EUV mask production. Because SEM images are pixel dose maps, deep learning (DL) offers an attractive alternative to the tedious and error-prone mask analysis performed by the operators and expert field application engineers in today’s mask shops. However, production demands preclude collecting a large enough variety and number of real SEM images to effectively train deep learning models. We have found that digital twins that can mimic the SEM images derived from CAD data provide an exceptional way to synthesize ample data to train effective DL models. Previous studies [1, 2, 3, 4] have shown how deep learning can be used to create digital twins. However, it was unclear if SEM images generated with digital twins would have sufficient quality to train a deep learning network to classify real SEM images. This paper shows how we built three DL tools for SEM-based mask analysis. The first tool automatically filters good quality SEM images, particularly for test chips, using a DL-based binary classifier. A second tool uses another DL model to align CAD and SEM images for applications where it is important that features on both the images are properly aligned. A third tool uses a DL multi-class classifier to categorize various types of VSB mask writer defects. In developing the three tools, we trained state-of-the-art deep neural networks on SEM images generated using digital twins to achieve accurate results on real SEM images. Furthermore, we validated the results of trained deep learning models through model visualization and accuracy-metric evaluation.