Market forces have compressed the various node transition phases in the semiconductor supply chain – Pathfinding, Ramp, and HVM. In addition to time pressures, there are competing demands for architectural tradeoffs, novel applications, and emerging imperatives like Machine Learning (ML) and Cloud-readiness. To tackle these multi-front challenges, today’s Computational Lithography EDA solution needs to be a multi-component offering that fosters a closed loop, system-wide optimization for each phase, while allowing customizations to satisfy the requirements of the different phases. In this talk, we identify the essential components of such an EDA solution as: Predictive model, Multi-constrained, globally-aware correction scheme, Stochastic awareness, Curvilinear mask-fracture awareness, and All embedded in a Cloud-ready, ML-enabled, flexible platform. We show how these components support the competing demands for the various phases in the semiconductor manufacturing lifecycle.
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