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11 October 2023 Delay optimization method of railway time synchronization network based on delay jitter
Tiaohong Bai, Li Lan, Xiaolin Wang, Jiakang Li
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Proceedings Volume 12800, Sixth International Conference on Computer Information Science and Application Technology (CISAT 2023); 128002K (2023) https://doi.org/10.1117/12.3003842
Event: 6th International Conference on Computer Information Science and Application Technology (CISAT 2023), 2023, Hangzhou, China
Abstract
This paper proposes a delay optimization scheme for railway time synchronization networks based on delay jitter to address the problem of decreased synchronization accuracy caused by path delay jitter in the time synchronization process. Firstly, the impact of path delay jitter on railway time synchronization networks is analyzed, and the synchronization error is quantitatively analyzed. Then, a corresponding delay optimization scheme is proposed to address the error. The scheme first achieves basic clock compensation for the client clock, and then obtains the optimal estimation of client clock compensation through an extended delay measurement mechanism implemented within the same period. This enables secondary compensation for the client clock, reducing the impact of path delay jitter on synchronization accuracy. Finally, a network time protocol simulation model is built in OPNET software to validate the proposed delay optimization method for railway time synchronization networks. Experimental results demonstrate that the proposed method improves the synchronization accuracy and stability of clocks in railway time synchronization networks.
(2023) Published by SPIE. Downloading of the abstract is permitted for personal use only.
Citation Download Citation
Tiaohong Bai, Li Lan, Xiaolin Wang, and Jiakang Li "Delay optimization method of railway time synchronization network based on delay jitter", Proc. SPIE 12800, Sixth International Conference on Computer Information Science and Application Technology (CISAT 2023), 128002K (11 October 2023); https://doi.org/10.1117/12.3003842
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KEYWORDS
Error analysis
Clocks
Computer simulations
Telecommunications
Time metrology
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