The cost of EUV lithography in chip production calls for imaging solutions that increase scanner throughput via dose reduction. By enhancing imaging via alternative low-n mask absorber materials, the imaging mask becomes a knob for dose reduction. Current low-n masks have an absorber thickness of 40 to 50nm. Thinning down the absorber results in image contrast losses, limiting their dose reduction potential in EUV lithography. Here we present wavefront optimization enabling thinning down low-n mask absorbers to 24 to 26nm. For single print EUV logic applications, this achieves a dose reduction of 20 to 30% compared to current low-n and Ta-based mask absorber thicknesses. In this simulation study, we first show that pole-to-pole image shifts drive the observed contrast losses at reduced low-n absorber thickness. Using wavefront optimization to overcome such image shifts, we then demonstrate that the low-n absorber thickness can be further reduced. The imaging potential of thinner low-n masks for current (0.33NA) and future (0.55NA) metal logic applications is evaluated by rigorous simulation overlapping process window (oPW) analysis. We also show that source/mask/wavefront co-optimization can enable a superior oPW depth of focus for the thinner low-n mask compared to the current generation of Ta-based and low-n masks. Finally, we propose available absorber materials with suitable optical properties for the practical implementation of thinner low-n masks and show their imaging strategy can be achieved at full illumination efficiency for single patterning metal logic applications down to a dense pitch of 20nm. In conclusion, our results prove that by employing wavefront optimization, thinner low-n masks provide similar or improved imaging at a much lower exposure dose.
|