Design and simulation of a DMA controller for FCoE transmission interface

Yiming Wang; Meng Feng

doi:10.1117/12.3052653

11 December 2024 Design and simulation of a DMA controller for FCoE transmission interface

Yiming Wang, Meng Feng

Proceedings Volume 13445, International Conference on Electronics, Electrical and Information Engineering (ICEEIE 2024); 1344529 (2024) https://doi.org/10.1117/12.3052653
Event: International Conference on Electronics. Electrical and Information Engineering (ICEEIE 2024), 2024, Haikou, China

Abstract

To achieve high-speed performance of Fiber Channel over Ethernet (FCoE) transmission interface, a Direct Memory Access (DMA) controller based on FPGA is designed. The controller supports AXI4 bus protocol and takes Round- Robin strategy for priority arbitration of multi-channel selection (32 channels with eight priorities at maximum). In order to promote the transmission rates of discrete data, the controller supports Scatter/Gather mode based on list descriptors that are stored and analyzed by DMA controller other than the MPU. Therefore, the MPU’s efficiency can be promoted. Using ISim tool of Xilinx ISE development kit, the reading and writing function of the DMA controller is verified through BRAM and FIFO access on Xilinx-Virtex6 FPGA chip.

(2024) Published by SPIE. Downloading of the abstract is permitted for personal use only.

Citation Download Citation

Yiming Wang and Meng Feng "Design and simulation of a DMA controller for FCoE transmission interface", Proc. SPIE 13445, International Conference on Electronics, Electrical and Information Engineering (ICEEIE 2024), 1344529 (11 December 2024); https://doi.org/10.1117/12.3052653

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