High-speed readout CCDs

K. Ball; D.J. Burt; Graham W. Smith

doi:10.1117/12.23945

1 April 1991 High-speed readout CCDs

K. Ball, D.J. Burt, Graham W. Smith

Proceedings Volume 1358, 19th Intl Congress on High-Speed Photography and Photonics; (1991) https://doi.org/10.1117/12.23945
Event: 19th International Congress on High-Speed Photography and Photonics, 1990, Cambridge, United Kingdom

Abstract

Limitations of standard three-phase frame transfer CCDs in high-speed operation are discussed with particular attention given to parallel and serial transfer, and the output amplifier. It is noted that in most CCD designs the greatest limitation on high-speed performance occurs in a serial register. At very high clock frequencies (greater than 30 MHz) actual generation and transmission of the necessary pulses can become the dominant restriction. Multiple output registers make it possible to obtain much higher readout frequencies. Design of a high-speed device capable of being fully readout in less than 2 mS is presented.

Citation Download Citation

K. Ball, D.J. Burt, and Graham W. Smith "High-speed readout CCDs", Proc. SPIE 1358, 19th Intl Congress on High-Speed Photography and Photonics, (1 April 1991); https://doi.org/10.1117/12.23945

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