Paper
12 September 1996 Plasma-etching-induced oxide degradation: effects upon device performance and circuit yield
Scott T. Martin, Guann-pyng Li, Eugene Worley, Joe White
Author Affiliations +
Abstract
Results from this work suggest that multiple oxide traps with a distribution in time constants are generated during reactive ion etching (RIE) of gate antennas and that the amount of oxide degradation generated during plasma etching may be more substantial than that produced during plasma ashing. The oxide traps generated during RIE produce additional drain current fluctuations associated with the slow-state trapping and detrapping of channel electrons. It is found that the amplitude ((Delta) ID) of these random telegraph signal (RTS) fluctuations may be modeled in terms of VT increases and that (Delta) ID scales as 1/Leff2. An example of circuit yield sensitivity to RIE over-etching effects in a Rockwell semiconductor systems production chip is presented. Prior to mask changes addressing an antenna effect, a large yield variance with a mean significantly lower than that predicted by the Do of the process was observed. The large yield variance was attributable to a differential pair VT mismatch induced by an antenna effect. After a simple lay-out change, a tight distribution near the predicted yield for the device was achieved. The analysis used to isolate the failure and the design fixes used to eliminate RIE effects are discussed.
© (1996) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Scott T. Martin, Guann-pyng Li, Eugene Worley, and Joe White "Plasma-etching-induced oxide degradation: effects upon device performance and circuit yield", Proc. SPIE 2874, Microelectronic Manufacturing Yield, Reliability, and Failure Analysis II, (12 September 1996); https://doi.org/10.1117/12.250821
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Cited by 1 scholarly publication.
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KEYWORDS
Antennas

Oxides

Field effect transistors

Plasma

Metals

Reactive ion etching

Semiconductors

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