Integrated cavity wafer level chip size package for MEMS applications

Danny Weiss; Doron Teomim; Avner P. Badihi; Gil Zilber

doi:10.1117/12.442942

28 September 2001 Integrated cavity wafer level chip size package for MEMS applications

Danny Weiss, Doron Teomim, Avner P. Badihi, Gil Zilber

Proceedings Volume 4557, Micromachining and Microfabrication Process Technology VII; (2001) https://doi.org/10.1117/12.442942
Event: Micromachining and Microfabrication, 2001, San Francisco, CA, United States

Abstract

The packaging of microelectromechanical devices is currently one of the most challenging in this emerging field. The available packaging technologies often provide large dimensions and expensive solutions, thereby limiting the market penetration of micro electromechanical devices. A wafer level chip scale package (WLCSP) with an integrated cavity above the active area of the device for microelectromechanical components is described. This WLCSP is designed for devices with mechanically moving components such as micromirrors, miniature gyroscopes, acceleration detectors, etc.

Citation Download Citation

Danny Weiss, Doron Teomim, Avner P. Badihi, and Gil Zilber "Integrated cavity wafer level chip size package for MEMS applications", Proc. SPIE 4557, Micromachining and Microfabrication Process Technology VII, (28 September 2001); https://doi.org/10.1117/12.442942

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available