The present paper describes a new indoor surveillance system for detection of an accident, such as fall or fit, happened to an aged single person. This system uses two types of cameras. One of them is the omni-directional image sensor for the tracking of the person’s position and detection of fall, and another is the controllable camera for capturing the detail of the person’s condition. The system detects points of the person’s head in images captured by some omni-directional image sensors, firstly. Then, a position of the person’s head in a room is computed from the points of person’s head in the images. When the person stops, the system classifies the person's pose into standing, sitting or lying according to the person's height. Then, the system judges that the accident has happened or not from the person’s pose, position and action. We made a prototype system with three omni-directional image sensors and a controllable camera. Then, we set the system in our laboratory’s room and experimented with the system. The implemented system detected the person’s position with the frame rate of 6 fps. In experiments, the error of position detection was 18 cm on the average. The error didn’t give serious influence to the control of the controllable camera. The error of height estimation was 6.9 cm. The conditions played by subjects were distinguished correctly.

In real-time content-oriented video applications, fast unsupervised object segmentation is required. This paper proposes a real-time unsupervised object segmentation that is stable throughout large video shots. It trades precise segmentation at object boundaries for speed of execution and reliability in varying image conditions. This interpretation is most appropriate to applications such as surveillance and video retrieval where speed and temporal reliability are of more concern than accurate object boundaries. Both objective and subjective evaluations, and comparisons to other methods show the robustness of the proposed methods while being of reduced complexity. The proposed algorithm needs on average 0.15 seconds per image. The proposed segmentation consists of four steps: motion detection, morphological edge detection, contour analysis, and object labeling. The contributions in this paper are: a segmentation process of simple but effective tasks avoiding complex operations, a reliable memory-based noise-adaptive motion detection, and a memory-based contour tracing and analysis method. The proposed contour tracing aims 1) at finding contours with complex structure such as those containing dead or inner branches and 2) at spatial and temporal adaptive selection of contours. The motion detection is spatio-temporal adaptive as it uses estimated intra-image noise variance and detected inter-image motion.

In this paper we derive the object-oriented requirements and a design for a class of Kalman filters suitable for real-time image processing. First, we describe the Kalman filter and we provide motivation for using it as a mechanism for fault-tolerant computing and sensor fusion. Next, the details of using Kalman filters in imaging applications are discussed. Then, the advantages of using object-oriented specification, design and languages for the implementation of Kalman filters are studied. Finally, we present a specification and design for a class of Kalman filters, which is suitable for coding.

An efficient approach to recognize distance-invariant appearing in outdoor and indoor scenes is introduced. The differences of the sizes of object images caused by varying distances are normalized by a model-based subsampling of images. The distance-invariant images both simplify and due to their reduced number of pixels help to accelerate object recognition. This model-based subsampling has been used for creating a database of distance-independent representations of various objects allowing the subsequent recognition of such objects in real time. An interactive user interface with a learning ability was provided to facilitate the introduction of new objects into the database. A number of algorithms for recognizing objects were implemented and evaluated. They employ different forms of object representations and were analyzed regarding their effectiveness for recognizing objects in varying distances. In experiments two of the investigated recognition methods, one based on cross correlation and the other one on user-defined edges, appeared suitable for realizing a fairly reliable object recognition in real time, as required by autonomous vehicles and mobile robots.

In this paper we present the capability and real-time processing features of Median M-type KNN and Wilcoxon M-type KNN filters for the removal of impulsive noise in real-time image processing applications. Extensive simulation results in known reference images have demonstrated that the proposed filter consistently could outperform other nonlinear filters by balancing the tradeoff between noise suppression and detail preservation. The criterions used to compare performance were the PSNR and MAE. The real-time implementation of image filtering was realized in the DSP TMS320C6701. The processing time of proposed filters includes the duration of data acquisition, processing and store data. We found that the values of processing time of proposed filters depend of the image to process and do not practically vary for different noise level; these values depend also of the complex calculation of influence functions and parameters of the proposed filters and the influence functions. We simulated impulsive corrupted image sequences to demonstrate that the proposed methods potentially could provide a real-time solution to quality TV/Video Transmission.

XML based metadata schemes and Interactive Digital Television (digiTV) are two new paradigms in the world of multimedia. Both paradigms shall be converged and provide an integrated solution for several participants in a digital, interactive television broadcast. The local digiTV equipment and software requirements for a metadata based service provision move more to an integrated multimedia experience. To be able to present a heterogeneous solution to the participants, certain preliminary assignments and structures have to be introduced. One integral requirement is the conceptualization of a XML based real-time metadata architecture in the world of digiTV to be able to apply advanced interactive narrative patterns (e.g. parallel stories), content descriptions (based on MPEG-7), and the description of items that are exchanged between users and the broadcast- and interaction service provider (e.g. MPEG-21). Within the scope of this research work we focus on the appliance of basic metadata concepts, real-time constrains, description schemes design for interactive broadcasts, cover conceptual design issues, metadata life-cycle, and synchronization mechanisms. We consider Digital Video Broadcasts (DVB) compliant design as entire requirement and show how metadata can be useful applied in accordance with this standard

To achieve significant noise reduction in medical images while at the same time preserving fine structures of diagnostic value, a non-linear filter called the multi-resolution gradient adaptive filter (MRGAF) was developed. Though the algorithm is well suited for its task of noise reduction in medical images, it is still limited to the application of offline processing in medical workstations due to its computational complexity. The aim of our study is to reach real-time processing of data from low-cost x-ray systems on a standard PC without additional hardware. One major drawback of the original MRGAF procedure is its irregular memory access behavior caused by the intermediate multi-resolution representation of the image (Laplacian pyramid). This is addressed by completely re-arranging the computation. The image is divided into super-lines carrying all relevant information of all pyramidal levels, which allow to apply the complete MRGAF procedure in a single pass. This way, the cache utilization is improved considerably, the total number of memory accesses is reduced, and the use of super-scalar processing capabilities of current processors is facilitated. The current implementation allows applying advanced multi-resolution non-linear noise reduction to images of 768 × 564 pixels at a rate of more than 30 frames per second on a workstation. This shows that high-quality real-time image enhancement is feasible from a technical as well as from an economical point of view.

An alternating spiralling-in scanning order combined with the Early Jump Out (EJO) technique is presented for fast elimination of candidate predictors in MPEG-2 block based Motion Estimation. The proposed scheme jointly exploits motion characteristics across both the horizontal and vertical directions and it is less biased across sequences of different content due to the alternating placement of the EJO check points with respect to the scanning order. On the average 3-14% computational reduction per frame is achieved for a 0.1db PSNR reduction for a whole range of sequences with very different characteristics.

In this paper we present the hardware implementation of image segmentation chain based on topological operators on a mixed FPGA/DSP architecture. These operators can segment a bi-class image into regions. This original method is based on some low-level operators, which do not need parameters. This is more interesting in architecture viewpoint, due to its simplicity and the fact that these low-level operators are used somehow in different phases of algorithm, hence an important reduction of used FPGA surface. Beside, the result of the segmentaion consists of closed and thin contours. This method is based on four basic operators which modify the topology of the image in order to segment it. The first operator of the image simplifies the topology of the image while preserving its gray level informations. A real image once simplified is full of irregular regions or points, due the noise or the texture of the regions. The second and third operators selectively eliminate respectively the irregular points and irregular regions. The fourth operator is to reconstruct the image. In this paper we present the implementation of these four operators on PCI architecture based on a FPGA circuit and a DSP processor.

Error diffusion is one of the most widely used algorithms for halftoning gray scale and color images. It works by distributing the thresholding error of each pixel to unprocessed neighboring pixels, while maintaining the average value of the image. Error diffusion results in inter-pixel data dependencies that prohibit a simplistic data pipelining processing approach and increase the memory requirements of the system. In this paper, we present a multiprocessing approach to overcome these difficulties, which results in a novel architecture for high performance hardware implementation of error diffusion algorithms. The proposed architecture is scalable, flexible, cost effective, and may be adopted for processing gray scale or color images. The key idea in this approach is to simultaneously process pixels in separate rows and columns in a diagonal arrangement, so that data dependencies across processing elements are avoided. The processor was realized using an FPGA implementation and may be used for real-time image rendering in high-speed scanning or printing. The entire system runs at the input clock rate, allowing the performance to scale linearly with the clock rate. Higher data rate applications required by future applications will automatically be supported using more advanced high-speed FPGA technologies.

The Associative Mesh, a reconfigurable, asynchronous and massively parallel SIMD architecture, is a hardware transposition of the Associative Nets model, where each entity, to achieve maximal efficiency, is supposed to stand for one pixel of an image. Global operations in the circuit are performed using an asynchronous electronic. This implementation allows for a very fast computation time - about a microsecond - and with a crossing time of each processor of about a nanosecond. Asynchronism also allows the design to save area, power and reach a higher clock frequency. Most of the image analysis algorithns for 2D or 3D set of datas can be implemented using the Associative Mesh. Our objective is to implement a full-size Associative Mesh with a SoC aim. To achieve this, we have studied the contribution of processors' virtualisation. We show that, provided a reorganisation of the synchronous part of the circuit, it offers a significant area gain which increases with the degree of virtualisation (reaching 20% for a degree equal to 16). We also discuss how virtualisation preserves the architecture's performances, and is useful to adapt the circuit to 3D treatments. Algorithm evaluations show that this architecture is compatible with real-time 2D and 3D image processing.

In this note we give a new architecture for the bi-orthogonal wavelet transform. The basis of our approach is a new convolver circuit that generates low and high pass values simultaneously in the forward transform, and combines low and high pass values in the inverse transform to produce even and odd data values. This is possible because of the symmetry of the bi-orthogonal wavelet coefficients and because the bi-orthogonal wavelet transform preserves the number of input data samples. The results are optimal in the sense of the number of multipliers used. The architecture given here is more efficient than lifting, for example in the case of the Daubechies 9-7 wavelet, lifting requires 6 multiplications per transformed (H, G) pair, while this method uses only 5. Note that the designs given here are fully pipelined and so are suitable for high-speed or low-power implementation.

An image-based range sensing technique is presented. The technique is originally considered for highway collision avoidance applications but its generality makes it suitable for application in robotics, manufacturing and metrology as well. It relies on depth from focus but, unlike conventional techniques, it extracts range with a single unmodulated Scheimpflug camera in continuous time. The range extraction algorithm is memoryless and simple enough to be implemented on the same chip with photosensors. The technique deploys a sensor plane that is tilted at a non-orthogonal angle with respect to the optical axis of the lens, and the optical axis intersects the sensor plane at the focal point. This optical arrangement creates a focusable object plane in an orientation parallel to the optical axis, and thus, enables range sensing along the same axis. The paper elaborates on the details of focus sensing on the tilted sensor plane, describes the CMOS sensor/processor chip designed and prototyped for this application, and presents experimental results.

The function of image processing systems usually consists of three basic steps: (i) image acquisition, (ii) image processing, and (iii) output of the results with possible intermediate image data presentation. 'Off the shelf' architectures, used, e.g., in the standard personal computers, achieve the necessary bus performance in the required real time only in few inline applications. Highly innovative bus systems with pipeline architectures are therefore needed for ensuring huge data throughput in the specifically oriented optical quality inspection systems. The imaging systems for quality inline inspection have to meet specific requirements on data acquisition and communications, mainly: -to ensure a connection of various sensors of heterogeneous nature, such as area scan cameras, line scan cameras, fast CMOS cameras with selectable readout capabilities, -to incorporate carefully designed high speed communication buses between the processing nodes and the sensor adapters, -to manifest a good balance between real time behavior, flexibility, performance and cost efficiency. We have developed innovative real time communication buses for the real-time imaging system designed in the ARC Seibersdorf research Ltd. and used in optical quality inspection of printed matter. In this paper we address in details: -the hardware layout and the individual functions of the innovative buses, -the evaluation of the behavior of the buses in a quality inspection system with extreme real-time demands. All benefits are explained and numerically documented that can be of interest for reader dealing with other applications.

Although the hardware platform is often seen as the most important element of real-time imaging systems, software optimization can also provide remarkable reduction of overall computational costs. The recommended code development flow for digital signal processors based on the TMS320C6000(TM) architecture usually involves three phases: development of C code, refinement of C code, and programming linear assembly code. Each step requires a different level of knowledge of processor internals. The developer is not directly involved in the automatic scheduling process. In some cases, however, this may result in unacceptable code performance. A better solution can be achieved by scheduling the assembly code by hand. Unfortunately, scheduling of software pipelines by hand not only requires expert skills but is also time consuming, and moreover, prone to errors. To overcome these drawbacks we have designed an innovative development tool - the Software Pipeline Optimization Tool (SPOT(TM)). The SPOT is based on visualization of the scheduled assembly code by a two-dimensional interactive schedule editor, which is equipped with feedback mechanisms deduced from analysis of data dependencies and resource allocation conflicts. The paper addresses optimization techniques available by the application of the SPOT. Furthermore, the benefit of the SPOT is documented by more than 20 optimized image processing algorithms.