Paper
6 December 2004 Simulating the process flow of the Nikon EPL new geometry mask
Author Affiliations +
Abstract
The International Technology Roadmap for Semiconductors requires improvements in resolution for each lithographic node. In order to meet the resolution requirements for the sub-65-nm nodes, image placement (IP) errors induced by chucking the mask during e-beam patterning, metrology, and exposure must be characterized and minimized. This study focused on a 200-mm electron projection lithography (EPL) stencil mask designed for high throughput. Finite element models were developed to simulate the response of the mask throughout a typical fabrication process flow, including the electrostatic chucking during e-beam patterning and EPL exposure. The results of this predictive study were used to identify the primary sources of IP error as a function of the system parameters.
© (2004) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Jaehyuk Chang, Roxann L. Engelstad, Edward G. Lovell, and Michael R. Sogard "Simulating the process flow of the Nikon EPL new geometry mask", Proc. SPIE 5567, 24th Annual BACUS Symposium on Photomask Technology, (6 December 2004); https://doi.org/10.1117/12.569315
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KEYWORDS
Photomasks

Electron beam lithography

Semiconducting wafers

Silicon

Device simulation

Mask making

Oxides

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