The LADC uses direct injection into a moderate sized integrating capacitor and several comparators create a stream of multi-bit data values. These values are accumulated in an SRAM based log2ALU and the radix of the ALU is combined with the data to generate a feedback current to the integrating capacitor, closing the delta loop. The integration time and a single pole low pass IIR filter are configurable using control signals to the log2ALU. The feedback current is at least partially generated using PWM for high linearity. |
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