Poster
12 March 2024 Experimental demonstration of silicon-based on-chip neuromorphic optical computing
Author Affiliations +
Proceedings Volume PC12892, Optical Interconnects XXIV; PC128920K (2024) https://doi.org/10.1117/12.3009156
Event: SPIE OPTO, 2024, San Francisco, California, United States
Conference Poster
Abstract
We propose an experimental demonstration of a silicon-based neuromorphic computing scheme with optical interconnects. The device consists of 4-channel input grating coupler arrays to guide 1550 nm light through the waveguide, tunable Mach-Zehnder Interferometer (MZI) mesh for matrix-vector multiplication, micro-ring resonator (MRR)-based MZI to implement nonlinear activation function, and 4-channel radiator array for free-space radiation. Depending on the different input information (i.e., image, voice, text, etc.), the radiated beam is focused in different directions to perform the classification task. Our proposed on-chip optical computing scheme can pave the way for future AIs, providing a small footprint, high-speed, cost-effective, and power-efficient.
© (2024) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Junhyeong Kim, Seokjin Hong, Jae-Yong Kim, Berkay Neseli, Jinhyeong Yoon, Hyo-Hoon Park, and Hamza Kurt "Experimental demonstration of silicon-based on-chip neuromorphic optical computing", Proc. SPIE PC12892, Optical Interconnects XXIV, PC128920K (12 March 2024); https://doi.org/10.1117/12.3009156
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KEYWORDS
Optical computing

Silicon

Artificial intelligence

Infrared cameras

Optical interconnects

Optical gratings

Power consumption

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