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Analytical expressions for the power spectral density (PSD) are often useful in stochastic lithography simulation and the metrology of roughness. Using a common stretched exponential correlation function with three parameters (standard deviation, correlation length, and roughness exponent), the PSD can be computed as the Fourier transform of the autocorrelation function. For the special cases of roughness exponent equal to 0.5 and 1, the PSD can be computed analytically for one, two, and three dimensions. In this paper, the analytical results of these calculations are given. The resulting equations can be used when modeling rough lines, surfaces, or volumes.

A novel electromagnetic microactuator with lateral magneto-static force was developed in this study. A simple fabrication process with low cost was proposed to realize the device for optical applications. The actuation performances in different vacuum degrees were also examined for the verification of following packaging efficacy. The present method assembled a tiny permanent magnet on a supporting beam to couple with a fixed solenoid coil for driving a suspension plate in vibration by applying an alternating current. Actuation modes with torsion and bending beams can be designed to satisfy the different optical applications, such as barcode reader, optical switch, and laser display. The typical experiment results for higher and lower actuation frequencies under the first resonant mode are 4.43 kHz and 179 Hz, respectively. In an ambient environment, the corresponding mechanical tilt angle to the case of higher frequency is 11.2 deg at the supply voltage ±2.5 V. The maximum tilt angle at the vacuum degree of 76 mTorr is increased by 31% compared with that of 760 Torr. The thermal effect induced by the coil is minimized to actuation performance, even at high vacuum environments. Thus, based on the results of this study, high reliability with high vacuum packaging can be expected.

In this study, a simple technique was introduced for the fabrication of nanogap electrodes by using nano-oxidation scanning probe microscopy lithography with a Cr/Pt coated silicon tip. Silicon electrodes with a gap of sub-31 nm were fabricated successfully by this technique. The current-voltage measurements (I-V) of the electrodes demonstrated excellent insulating characteristics. This technique is simple, controllable, inexpensive, and faster than common methods. The results showed that silicon electrodes have a great potential for the fabrication of single molecule transistors, single electron transistors, and other nanoelectronic devices.

ITRS lithography's stringent specifications for the 22 nm node are a major challenge for the semiconductor industry. With the EUV point insertion at 16 nm node, ArF lithography is expected to reach its fundamental limits. The prevailing view of holistic lithography methods, together with double patterning techniques, has targeted bringing lithography performance toward the 22 nm node (i.e., closer to the immersion scanner resolution limit) to an acceptable level. At this resolution limit, a mask is the primary contributor of systematic errors within the wafer intrafield domain. As the ITRS critical dimension uniformity (CDU) specification shrinks, it would be crucial to monitor the mask static and dynamic critical dimension (CD) changes in the fab, and use the data to control the intrafield CDU performance in a most efficient way. Furthermore, optimization and monitoring of process windows (PW) becomes more critical due to the presence of mask three-dimensional effects. This paper will present double patterning inter- and intrafield data, for CDU and PW monitoring and optimization, measured by Applied Materials' mask inspection and CD-SEM tools. Special emphasis was given to speed and effectiveness of the inspection for a production environment.

This paper reports a facile and maskless method for fabricating nanofluidic channel arrays using near-field electrospinning (NFES) templates with prescribed patterns and the polydimethylsiloxane (PDMS) molding technique. Nanochannels were fabricated monolithically through three main steps: 1) direct-writing nanofiber arrays onto a silicon substrate using NFES, 2) PDMS molding of the prescribed nanofibers patterns, and 3) plasma treating PDMS substrate to promote the adhesion and bonding process. The nanochannels fabricated in this study had channel widths ranging from 500 to 1300 nm and depths of 70 to 500 nm, and were patterned in a fashion similar to the wire bonding process routinely used in the semiconductor industry. The nanochannel dimensions were predominantly dictated by electrospun nanofibers, showing that NFES is capable of depositing nanofibers with a diameter down to ∼50 nm. Results show that reliable and repeatable nanofluidic channel arrays were speedily fabricated at a very low cost, while nanofluidic patterns and dimensions are predominantly controlled by NFES in a direct-write, addressable manner.

The jet and flash imprint lithography (J-FILTM) process uses drop dispensing of UV curable resists to assist high resolution patterning for subsequent dry etch pattern transfer. The technology is actively being used to develop solutions for memory markets including flash memory and patterned media for hard disk drives. It is anticipated that the lifetime of a single template (for patterned media) or mask (for semiconductors) will be on the order of 10⁴ to 10⁵ imprints. This suggests that tens of thousands of templates/masks will be required to satisfy the needs of a manufacturing environment. Electron-beam patterning is too slow to feasibly deliver these volumes, but instead can provide a high quality master mask which can be replicated many times with an imprint lithography tool. This strategy has the capability to produce the required supply of "working" templates/masks. In this paper, we review the development of the mask form factor, imprint replication tools, and the semiconductor mask replication process. A Perfecta^TM MR5000 mask replication tool has been developed specifically to pattern replica masks from an e-beam written master. Performance results, including image placement, critical dimension uniformity, and pattern transfer, are covered in detail.

The key challenge before extreme ultraviolet lithography is to make defect-free masks, for which it is important to identify the root cause of defects, and it is also necessary to establish suitable critical mask defect size for the production of ULSI devices. We have been developing extreme ultraviolet (EUV) mask infrastructures such as a full-field actinic blank inspection tool and 199 nm wavelength patterned mask inspection tool in order to support blank/mask supplier in reducing blank/mask defects which impact wafer printing. In this paper, by evaluating the printability of programmed phase defects and absorber defects exposed by full-field scanner EUV1, we demonstrate that defect detection sensitivities of actinic blank inspection and patterned mask inspection are higher than that of wafer inspection in HP32nm. The evaluations were done by comparing the detection sensitivities of full-field actinic blank inspection tool, 199 nm wavelength patterned mask inspection tool, and electron beam (EB) wafer inspection tool. And then, based on the native defect analysis of blank/mask, we ascertained that actinic blank inspection and patterned mask inspection are effective in detecting killer defects both at the main pattern and at the light-shield border area.

The recent algorithm Corner is a transform-based technique to represent a circuit layout image for maskless direct write lithography systems. We improve the lossless circuit layout compression algorithm Corner so that 1. it requires fewer symbols during the corner transform, 2. it has a simpler and faster decoding process, while 3. it requires a similar amount of memory for the decoding process.

Nanoimprint lithography (NIL) has the potential capability of high resolution with critical dimension uniformity that is suited for patterning shrinkage, as well as providing a low cost advantage. However, the defectivity of NIL is an impediment to the practical use of the technology in semiconductor manufacturing. We have evaluated defect levels of NIL and have classified defectivity into three categories; nonfill defects, template defects, and plug defects. New materials for both the template and resist processes reduce these defects to practical levels. Electric yields of NIL are also discussed.

We investigate bonding polydimethylsiloxane (PDMS) to silicon using a thin (∼2 μm) intermediate adhesive layer stamped onto a PDMS piece prior to bonding. In particular, we compare as adhesive layers Sylgard 184 and 182 curing agents and a UV curable adhesive (NOA 75). We examine the effect of both curing temperature and duration on curing agent bond strength. Bond strengths for the different adhesives are determined by measuring the average burst pressure at a PDMS-silicon interface using a PDMS test design. We find that Sylgard 184 curing agent gives the highest bond strength with burst pressure of 700 kPa or more for curing at either 60°C for 3 h, 70°C for 30 min, or 90°C for 20 min. Curing at room temperature takes substantially more time with an average burst pressure of 433 and 555 kPa for curing times of 16 and 27 h, respectively. In comparison, Sylgard 182 curing agent takes 32 h at room temperature to achieve a burst pressure of 289 kPa, while NOA 75 with a 50°C 12 h post-UV exposure bake yields a burst pressure of 125 kPa.

Wafer-level optics is considered to yield imaging lenses for cameras of the smallest possible form factor. The high accuracy of the applied microsystem technologies and the parallel fabrication of thousands of modules on the wafer level make it a hot topic for high-volume applications with respect to quality and costs. However, the adaption of existing materials and technologies from microoptics for the manufacturing of millimeter scale lens diameters led to yield problems due to material shrinkage and z-height accuracy. A multi-aperture approach to real-time vision systems is proposed that overcomes these issues because it relies on microlens arrays. The demonstrated prototype achieves VGA (Video Graphics Array, 640×480 pixels) resolution with a thickness of 1.4 mm, which is a thickness reduction of 50% compared to single-aperture equivalents. The partial images that are separately recorded in different channels are stitched together to form a final image of the whole field of view by means of image processing. Distortion is corrected within the processing chain. The microlens arrays are realized by state-of-the-art micro-optical fabrication techniques on wafer level that are suitable for a potential application in high volume, e.g., for consumer electronic products.

Forbidden pitches that are introduced under certain illumination conditions can have extremely narrow depth of focus (DOF), so that when a lithographic pattern is transferred to a wafer, the forbidden pitch should be removed from the layout. However, the sensitivity of this narrow DOF can be utilized to monitor focus changes in the scanner system itself. In this paper, a newly developed focus monitoring method utilizing the forbidden pitches is introduced and the sensitivity and advantages of this method are discussed in detail.

For the manufacturing of semiconductor technologies following the ITRS roadmap, we will face nodes well below a 32-nm half pitch in the next 2 to 3 years. Despite being able to achieve the required resolution, which is now possible with electron beam direct-write variable-shaped beam equipment and resists, it becomes critical to precisely reproduce dense line space patterns onto a wafer. This exposed pattern must meet the targets from the layout in both dimensions (horizontally and vertically). For instance, the end of a line must be printed in its entire length to allow a contact to be placed later. Up to now, the control of printed patterns such as line ends was achieved by a proximity effect correction mostly based on a dose modulation. This investigation of line end shortening (LES) includes multiple novel approaches, and contains an additional geometrical correction to push the limits of the available data preparation algorithms and the measurement. The designed LES test patterns, which aim to characterize the status of LES in a quick and easy way, were exposed and measured at Fraunhofer Center Nanoelectronic Technologies using its state-of-the-art electron beam direct writer and CD-SEM. Simulation and exposure results with the novel LES correction algorithms applied to the test pattern and a large production-like pattern in the range of our targeted critical structure dimensions in dense line space features smaller than 40 nm will be shown.

Carbon microelectrodes have been implemented as sensing phases in order to improve the efficiency of the electrochemical sensing in capillary electrophoresis microchips. Surface and embedded carbon microelectrodes were fabricated on glassy substrates using a laser lithography technique. Both types of microelectrodes were successfully verified and, in the case of embedded microelectrodes, are proving to be an excellent alternative to increase the sensitivity of biosensors based on capillary electrophoresis.

The generation of subresolution assist features (SRAFs) using inverse-lithography techniques demands extensive computational resources which limits its deployment in advanced CMOS nodes. In this paper, we propose a wavefront-based pixel inversion algorithm to quickly obtain inverse masks with a high aerial image quality. Further assisted by a flexible pattern simplification technique, we present effective SRAF generation and placement based on the calculated inverse mask. The proposed approach can be easily inserted prior to a conventional mask correction flow for subsequent concurrent optimizations of both drawn patterns and SRAFs. The innovative pixel inversion and pattern simplification techniques allow quality mask corrections as produced by inverse lithography while maintaining the convenience of standardized/validated process flows currently used in the industry.

A mask inspection review of pattern features and defects is normally carried out using a secondary electron microscopy technique. Ideally, such mask inspection reviews should be nondestructive; nonetheless, as reported in this paper, high-dose exposures of extreme-ultraviolet mask surfaces have resulted in significant topographical changes, which were revealed by topographical mapping of reviewed masks using atomic force microscopy. Exposures with current densities of 1 mA/cm² and higher resulted in the formation of topographical features in and around the scanned region on mask surfaces. On the Ru-capped multilayer blanks, the topographies consisted of small or absent depressions surrounded by ridges, which were attributed to secondary-electron-emission induced hydrocarbon deposition. On the chromium-nitride backsides, the topographies were usually simple depressions, although sometimes ridges were observed. The depressions were attributed to volume compaction in the substrate, and were observed for all four mask surfaces studied, substrate compaction took place with both quartz and low thermal expansion material substrates. The height range of the topography extended up to 25 nm, whereas the lateral dimensions often exceeded the scanned area by about a micrometer. While these lateral extensions could not be explained by either beam-induced heating or stress relief, Monte Carlo simulations showed that it could be explained qualitatively by the size of the region within which the energy deposition had taken place. This interpretation suggests that the current understanding as described by Hau-Riege qualitatively describes our observations related to depression topography.

Shrinking design rules and reduced process tolerances require tight control of critical dimension (CD) linewidth, feature shape, and profile of the printed geometry. The holistic metrology approach consists of utilizing all available information from different sources such as data from other toolsets, multiple optical channels, multiple targets, etc., to optimize metrology recipe and improve measurement performance. Various in-line CD metrology toolsets such as scatterometry optical CD, CD-SEM, and CD-AFM are typically utilized individually in fabs. Each of these toolsets has its own set of limitations that are intrinsic to specific measurement technique and algorithm. Here we define "hybrid metrology" to be the use of any two or more metrology toolsets in combination to measure the same dataset. We demonstrate the benefits of the hybrid metrology on two test structures: 22-nm-node gate develop inspect and 32-nm-node fin-shaped field effect transistor gate final inspect. We will cover measurement results obtained using typical BKM (nonhybrid, single toolset standard results) as well as those obtained by utilizing the hybrid metrology approach. Measurement performance will be compared using standard metrology metrics; for example, accuracy and precision.

In order to accurately measure narrow-space patterns, we propose an improved secondary-electron extraction efficiency model for the model-based library method. In the conventional model, the same extraction efficiency is applied to all electrons, regardless of from where the electrons are emitted. This is a simplified model that assumes a uniform extraction electric-field strength. In the improved model, the extraction efficiency is calculated as a function of the pattern shape and the emission position of the electrons. The function is based on simulation results for the electric-field strength of critical-dimension scanning electron microscopy (SEM) optics. We verify the effectiveness of the improved extraction model by applying this model to measurements of actual patterns with space widths in the (20 to 30) nm range. The measurement bias of the sidewall angle (SWA) is evaluated through comparison to cross-sectional SEM measurements. We demonstrate that the average SWA bias is improved from 0.8 deg for the conventional model to 0.04 deg for the improved model.

High quality rectangular micro- to nanochannels with SiO2 shells have been fabricated by using optimized preparation parameters. Various dimensions of cross section of channels have been effectively controlled via the polymethyl methacrylate template as a suitable sacrificial layer in the processes of pattern formation and nanolithography. And, the fabricated channels have excellent shape uniformity, smooth inner surface, and vertical sidewalls along the longitudinal axis, which is confirmed by the good agreement between the experimental data and theoretical values of the mean filling speeds of liquids in the confined space. This technique exhibits the potential advantage for the controllable fabrication of various micro- to nanofluidic devices.

This PDF file contains the errata for “JM3 Vol. 10 Issue 04 Paper 3647513” for JM3 Vol. 10 Issue 04