EUV blank non-flatness results in both out of plane distortion (OPD) and in-plane distortion (IPD) [3-5]. Even for extremely flat masks (~50 nm peak to valley (PV)), the overlay error is estimated to be greater than the allocation in the overlay budget. In addition, due to multilayer and other thin film induced stresses, EUV masks have severe bow (~1 um PV). Since there is no electrostatic chuck to flatten the mask during the e-beam write step, EUV masks are written in a bent state that can result in ~15 nm of overlay error. In this article we present the use of physically-based models of mask bending and non-flatness induced overlay errors, to compensate for pattern placement of EUV masks during the e-beam write step in a process we refer to as E-beam Writer based Overlay error Correction (EWOC). This work could result in less restrictive tolerances for the mask blank non-flatness specs which in turn would result in less blank defects.
Extreme Ultraviolet Lithography (EUVL) masks have residual stress induced by several thin films on low thermal
expansion material (LTEM) substrates. The stressed thin films finally result in convex out-of-plane displacement (OPD)
of several 100s of nm on the pattern side of the mask. Since EUVL masks are chucked on EUVL scanners differently
from on e-beam writer, the mask pattern placement errors (PPE) are necessary to be corrected for to reduce overlay
errors. In this paper, experimental results of pattern placement error correction using standard chrome on glass (COG)
plate will be discussed together with simulations. Excellent agreement with simple bending theory is obtained.
Suitability of the model to compensate for other EUVL-related PPEs due to mask non-flatness will be discussed.
Extreme ultraviolet lithography (EUVL) tool development achieved a big milestone last year as two full-field
Alpha Demo Tools (ADT) were shipped to customers by ASML. In the future horizon, a full field "EUV1" exposure
tool from Nikon will be available by the end of 20071 and the pre-production EUV exposure tools from ASML are
targeted for 20092. It is essential that high quality EUVL masks can be made and delivered to the EUVL tool users to
support the technology development. In the past year, we have demonstrated mask fabrication with low stress absorber
deposition and good etch process control yielding a vertical etch profile and a mask CD control of 5.7 nm for 32 nm (1x)
space and 7.4 nm for 32 nm (1x) lines. Mask pattern resolution of 15 nm (1x) dense lines was achieved. Full field
reflective mask die-to-die inspection at a 125nm pixel size was demonstrated after low defect multilayer blanks became
available.
In this paper, we will present details of the Intel EUVL Mask Pilot Line progress in EUVL mask defect reduction,
pattern CD performance, program defect mask design and inspection, in-house absorber film development and its
performance, and EUVL metrology tool development. We will demonstrate an overall improvement in EUV mask
manufacturing readiness due to our Pilot Line activities.
It becomes increasingly important to have an integrated process for Extreme UltraViolet (EUV) mask fabrication in order to meet all the requirements for the 32 nm technology node and beyond. Intel Corporation established the EUV mask pilot line by introducing EUV-specific tool sets while capitalizing on the existing photomask technology and utilizing the standard photomask equipment and processes in 2004. Since then, significant progress has been made in
many areas including absorber film deposition, mask patterning optimization, mask blank and patterned mask defect inspection, pattern defect repair, and EUV mask reflectivity metrology. In this paper we will present the EUV mask process with the integrated solution and the results of the mask patterning process, Ta-based in-house absorber film deposition, absorber dry etch optimization, EUV mask pattern defect inspection, absorber defect repair, and mask reflectivity performance. The EUV resist wafer print using the test masks that are fabricated in the EUV mask pilot line will be discussed as well.
Mask defect specifications not only are needed to ensure quality masks for acceptable resist patterning on wafers, but also are utilized as a common goal for tool development, noticeably for mask inspection and repair. Defect specifications are generally determined by the allowable critical dimension (CD) changes from 'defect printability' experiments where a programmed defect mask (PDM) with intentionally placed defects is exposed in a stepper and the changes in resist CDs are measured. With the recent availability of extreme ultra-violet micro-exposure tools (EUV MET), a small field stepper with a numerical aperture (NA) of 0.3, 5X reduction and adjustable degrees of coherence, we are able for the first time to perform extensive studies of pattern defect printability for EUV masks with a high NA exposure tool. Such studies have investigated the defect impact to feature CDs for three different types of patterns: poly gate layer, contacts, and dense lines and spaces. This paper presents the experimental results and analysis of printability data collected under two illumination conditions, annular and dipole, on the MET with full focus and dose matrix (FEM). We have investigated as many as 10 types of defects designed on the PDM for each pattern layer. For each type of defect, a total of 15 sizes are coded on the PDM. With the consideration of limited resolution and line edge roughness of current EUV resists commonly used for EUV lithography development, the CDs under study were chosen in the range of about 40nm to 70nm. Extrapolations from these data are made to predict pattern defect specifications for smaller resist line features. Resist resolution is the main reason for the discrepancies between aerial image simulations and data presented in this paper.
A multibeam confocal inspection (MCI) beta-tool for mask blank defect detection has been developed and widely adopted at several organizations involved in the research and development of low-defect extreme ultraviolet (EUV) mask blanks. There are two important objectives of this tool development project: (1) ensuring that all printable multilayer and substrate defects are detectable at the
half-pitch 45-nm technology node and beyond and (2) enabling a metrology standard for acceptance or rejection of mask blanks before further processing such as deposition and patterning. This paper documents the technical challenges and the latest best known methods developed to (1) improve the detection sensitivity of the current MCI tool before the next-generation tool arrives and (2) quantify the detection sensitivity differences and correlate the measurement results of the same mask blank from different MCI tools. Several options are discussed and found to be effective to increase sensitivity. Tool differences are discussed and a calibration standard based on a tool detection model and a confocal imaging model is proposed. This work will result in one of the key methodologies required to ensure the yield of EUV lithography.
We have developed and characterized a stack of TaN (absorber) and TaON (ARC) using reactive magnetron sputtering method. Two DOE (design of experiments) were performed with varying gas and power parameters and their effects on the various film parameters are discussed. We characterized the stress, uniformity, reflectivity (for defect inspection and EUV wavelengths), defect adders, and etch performance. Film property characterization was performed with AFM, Optical reflectance measurement tool, Particle inspection tool and profilometer. Optimized film stack met or exceeded ITRS guideline for EUV lithography mask with film stress less than 200MPa, inspection wavelength reflectivity at 9%, and thickness uniformity less than 5%. Defect adder number (< 0.5 / cm2) was a strong function of underlying film surface roughness and cleanliness of surface as well as deposition parameters.
To reduce the risk of EUV lithography adaptation for the 32nm technology node in 2009, Intel has operated a EUV mask Pilot Line since early 2004. The Pilot Line integrates all the necessary process modules including common tool sets shared with current photomask production as well as EUV specific tools. This integrated endeavor ensures a comprehensive understanding of any issues, and development of solutions for the eventual fabrication of defect-free EUV masks. Two enabling modules for "defect-free" masks are pattern inspection and repair, which have been integrated into the Pilot Line. This is the first time we are able to look at real defects originated from multilayer blanks and patterning process on finished masks over entire mask area.
In this paper, we describe our efforts in the qualification of DUV pattern inspection and electron beam mask repair tools for Pilot Line operation, including inspection tool sensitivity, defect classification and characterization, and defect repair. We will discuss the origins of each of the five classes of defects as seen by DUV pattern inspection tool on finished masks, and present solutions of eliminating and mitigating them.
The ability of a confocal microscope to inspect for defects on EUVL mask blanks has been investigated both experimentally and theoretically. A model was developed to predict the image contrast of confocal microscope. Measurements were made on PSL spheres and programmed multilayer defects using a Lasertec M1350 operating with 488 nm light. The images obtained of PSL spheres on both fused silica and multilayer-coated blanks are found to be accurately predicted with the model using no adjustable parameters. Good agreement is also demonstrated for the modeling of multilayer defects. Predictions are made for the expected increase in contrast at the shorter wavelength of 266 nm. Substrate roughness contributes to the "noise" which limits the sensitivity to small defects. The contrast fluctuations due to roughness have been modeled using a simple single surface approximation. The model has been validated with measurements on substrates with varying degrees of roughness. The contribution of mask roughness to the sensitivity of a 266 nm tool is estimated.
The introduction of extreme ultraviolet (EUV) lithography into high volume manufacturing requires the development of a new mask technology. In support of this, Intel Corporation has established a pilot line devoted to encountering and eliminating barriers to manufacturability of EUV masks. It concentrates on EUV-specific process modules and makes use of the captive standard photomask fabrication capability of Intel Corporation. The goal of the pilot line is to accelerate EUV mask development to intersect the 32nm technology node. This requires EUV mask technology to be comparable to standard photomask technology by the beginning of the silicon wafer process development phase for that technology node. The pilot line embodies Intel's strategy to lead EUV mask development in the areas of the mask patterning process, mask fabrication tools, the starting material (blanks) and the understanding of process interdependencies. The patterning process includes all steps from blank defect inspection through final pattern inspection and repair. We have specified and ordered the EUV-specific tools and most will be installed in 2004. We have worked with International Sematech and others to provide for the next generation of EUV-specific mask tools. Our process of record is run repeatedly to ensure its robustness. This primes the supply chain and collects information needed for blank improvement.
Defect detection sensitivity of a multi-beam confocal inspection system operating at a wavelength of 488 nm is characterized using experiments and image modeling. Experimental data on defect sensitivity are reported for programmed defects on mask substrates and blanks that are being developed for extreme ultraviolet lithography. The effects of sample surface roughness on the detection sensitivity and signal-to-noise levels are quantified. Theoretical analysis of confocal imaging of defects is in excellent agreement with measured defect images. Modeling is used to predict inspection sensitivity for defects commonly found on mask blanks.
We have installed the industry's first commercial electron beam mask repair tool in Intel's mask shop. In this paper we describe our on-going efforts of developing e-beam repair processes for binary, phase-shifting and EUVL masks. We present a complete characterization of fundamental capabilities of e-beam repair and make general comparisons with other technologies, in terms of repair resolutions, substrate damage, edge placement, removal selectivity, and process margin. Among many applications, results from quartz etch with excellent resolution and vertical profile are described.
In this paper, we present the test results obtained from the first commercial electron beam mask repair tool. Repaired defect sites on chrome-on-glass masks are characterized with 193nm AIMS to quantify the edge placement precision as well as optical transmission loss. The electron beam mask repair tool is essentially based on a scanning electron microscope (SEM), therefore, it can be used for in-situ CD and defect metrology. E-beam for EUV mask defect repair is also discussed. These early results are very encouraging and demonstrate the basic advantages of electron beam mask repair as well as highlight the key challenge of charge control.
The source of flare in EUVL systems is mostly from the mid-spatial frequency roughness (1 /μm - 1 /mm spatial periods) of mirrors. Due to the challenges in polishing mirrors to a small fraction of the wavelength, flare in EUV lithography tools is expected to be greater than flare in current DUV tools. Even though EUV flare is constant across the field, there can be within-die flare variations due to variations in layout density. Hence, it is expected that to meet the CD control requirements for the 32 nm node, Flare Variation Compensation (FVC), akin to Optical Proximity Correction (OPC) would be required. FVC needs the within-die flare level estimated by convolving the Point Spread Function due to scatter (PSFsc) with the mask layout. Thus, accurate knowledge of the system PSFsc is essential for FVC. Experimental results of the Modulation Transfer Function (MTF) technique to estimate flare and the PSFsc of the Engineering Test Stand (ETS) are presented. It was also determined that due to the nature of the PSFsc in EUVL tools a more accurate measure for flare would be to use the 0.5 μm line as opposed to the current 2 μm line standard for measuring flare on DUVL tools.
The printability of both amplitude and phase defects has been investigated in proximity to absorber lines with widths corresponding to the 45 nm and 32 nm nodes. The single surface approximation was used to simulate defects within the multilayer coating. The printability of Gaussian phase defects was simulated versus width and height and location with respect to the absorber line. For narrow defects the worst location was found to be next to the absorber line, while wide defects had the greatest effect when centered under the absorber. A uniform flare was found to have little effect on the critical defect size. The results of these simulations are aimed at defining the critical defects for EUVL masks designed for the 32 nm node.
One of the key challenges for the successful implementation of EUV Lithography (EUVL) is the supply of defect free mask blanks. Obviously a reliable defect inspection is a prerequisite to achieve this goal. We report results from a EUVL blank inspection tool developed by Lasertec. The inspection principle of this tool is
based on confocal microscopy at 488nm inspection wavelength. On quartz substrates a sensitivity of 60nm is demonstrated. On buried defects in the multilayer stack a reasonable capture rate down to approximately 25nm defect height has been measured. We compare these results to previously reported data on the wafer version
(M350) of the current M1350.
Inspection of extreme ultraviolet (EUV) lithography masks requires reflected light and this poses special challenges for inspection tool suppliers as well as for mask makers. Inspection must detect all the printable defects in the absorber pattern as well as printable process-related defects. Progress has been made under the NIST ATP project on "Intelligent Mask Inspection Systems for Next Generation Lithography" in assessing the factors that impact the inspection tool sensitivity. We report in this paper the inspection of EUV masks with programmed absorber defects using 257nm light.
All the materials of interests for masks are highly absorptive to EUV light as compared to deep ultraviolet (DUV) light. Residues and contamination from mask fabrication process and handling are prone to be printable. Therefore, it is critical to understand their EUV printability and optical inspectability. Process related defects may include residual buffer layer such as oxide, organic contaminants and possible over-etch to the multilayer surface. Both simulation and experimental results will be presented in this paper.
Extreme ultraviolet (EUV) multilayer defects (phase defects) are a defect type unique to extreme ultraviolet lithography (EUVL) masks. A manufacturable inspection capability for these defects is key to the success of EUV lithography. Simulations of EUV scattering from multilayer defects suggest that defect printability is related to the phase error induced by the defect, which is in turn strongly coupled to the size of a multilayer surface protrusion or intrusion. We can adopt a strategy of measuring the multilayer surface to detect phase defects.
During the past year a working group composed of members of Intel Corporation, Lawrence Berkeley and Lawrence Livermore National Laboratories, and International Sematech searched for a commercial tool for EUVL mask substrate and blank inspection. This working group established the tool requirements, methodologies for tool evaluation, collected data and recommended a supplier for further development with International Sematech. We collected data from several vendors and found that a multibeam confocal inspection (MCI) system had a capability significantly better than the tools used today.
We will present our strategy, requirements, methodologies and results. We will discuss in detail our unique programmed substrate and multilayer defect masks used to support the tool selection, including their actinic characterization. We will present data that quantifies the inspection capability of the MCI system.
Substrate damage from Ga ions is a fundamental problem of using focused ion beam (FIB) for mask defect repair. One way to avoid substrate damage from repair is to replace Ga ions with electrons. In this paper, we describe our efforts and present some promising results that demonstrate the feasibility of using e-beam induced processes for mask repair. We employ e-beam induced chemical etching for opaque defect removal and metal deposition for clear defect repair. The examples will include Pt deposition, quartz etch for phase-shift mask and TaN etch for EUV mask. High-resolution electron beam technology is relatively mature, so the infrastructure for building an e-beam system suitable for mask repair exists today. This makes the development of an e-beam based damage-free repair technology attractive. E-beam also offers superior spatial resolution for high edge placement precision and image quality for small defects on ever shrinking mask features.
This paper presents the results of patterned and unpatterned EUV mask inspections. We will show inspection results related to EUV patterned mask design factors that affect inspection tool sensitivity, in particular, EUV absorber material reflectivity, and EUV buffer layer thickness. We have used a DUV (257nm) inspection system to inspect patterned reticles, and have achieved defect size sensitivities on patterned reticles of approximately 80 nm. We have inspected EUV substrates and blanks with a UV (364nm) tool with a 90nm to a 120 nm PSL sensitivity, respectively, and found that defect density varies markedly, by factors of 10 and more, from sample to sample. We are using this information in an ongoing effort to reduce defect densities in substrates and blanks to the low levels that will be needed for EUV lithography. While DUV tools will likely meet the patterned inspection requirements of the 70 nm node in terms of reticle defect sensitivity, wavelengths shorter than 200 nm will be required to meet the 50 nm node requirements. This research was sponsored in part by NIST-ATP under KLA-Tencor Cooperative Agreement #70NANB8H44024.
For optical inspection of Extreme Ultraviolet Lithography (EUVL) masks using Deep Ultraviolet (DUV) light, contrast from reflected light is used to form the image of the mask and detect the defects. The inspectability of a patterned mask depends on the optical properties, surface conditions and thickness of absorber and buffer layer. The issue in EUVL mask inspection is the relatively low image contrast in the inspection tool because both the EUV-reflective and EUV-absorbing regions reflect DUV light. The need of a buffer layer to protect the multilayer (ML) reflector during mask processing and defect repair necessitates two inspections for a patterned mask: one with the buffer layer on to find the defect for repair and one with the buffer layer removed to qualify a final mask. Since the ML appears bright at DUV inspection wavelengths, the buffer layer is also chosen to give high reflectivity. Therefore, the absorber reflectivity must be low enough to provide high image contrast and to avoid the edge interference effect. Recently, we have developed a surface treatment process to reduce the reflectivity of absorber layer and result in a DUV contrast approaching 90 percent. This greatly improves the optical inspectability of EUVL mask to a level similar to conventional transmission mask. In this paper, we describe the overall EUVL mask inspection strategy and present a comprehensive discussion on mask optimization in materials selection and modification for high inspectability. We report the reflectivity of Mo-Si multilayer, buffer layers using SiO2 and Ru, and absorber layers of Cr and TaN. We will demonstrate with DUV inspection images of the optimized EUVL masks that the image contrast and quality from reflected light are close to those of conventional photo-masks with transmitted light. This greatly enhanced EUVL mask inspectability will increase defect detectability for inspection tools and simplify image rendering in die-to-database inspection.
The industry traditionally uses a single number, the change in the printed line width, to quantify mask defect printability. The measurement of this change is done in the direction perpendicular to a main feature, usually a line. We often ignore the extent of the printed defect parallel to the line even though our intuition tells us it will also contribute to the impact of the defect. If the lithography resolution improves the defects will be better resolved and their printed image will more closely approximate the shape of the defect. This leads to an increase in the line width change of the defect. This leads to very high defect printability in the case of high k1 lithographies, such as extreme ultraviolet lithography (EUVL). Thus, traditional methods of quantifying printability will lead to very stringent mask defect specs for capable lithographies with low mask error enhancement factors. We present an analysis of the electrical impact of gate layer defects and derive an expression that takes the printed defect extent in both directions into consideration. Since the printed defect extent parallel to the line depends on the lithography resolution and, therefore, the lithography process k1 factor, the electrical impact of the mask defect can be shown to be dependent on k1. Finally, we will present a mask defect criterion with explicit k1 dependence and discuss its implication to EUVL.
A UV inspection tool has been used to image and inspect Next Generation Lithography (NGL) reticles. Inspection images and simulations have been used to provide feedback to mask makers so that inspectability of NGL masks can be optimized. SCALPEL masks have high optical contrast and look much the same in reflection as conventional chrome on glass masks do in transmission. EPL stencil masks can be imaged well in reflection, but defects below the top surface, in the cutouts, may not be detectable optically. EUV masks that have been made to date tend to have relatively low contrast, with line edge profiles that are complex due to interference effects. Simulation results show that improved EUV inspection images can be obtained with a low reflectivity absorbing layer and proper choice of buffer layer thickness.
In an attempt to narrow the choice for an absorber used in EUV masks, different materials are being evaluated. These materials need to meet the absorber requirements of EUV absorbance, emissivity, inspection, and repair, to name a few. We have fabricated masks using Cr absorbers. The absorber stack consists of a repair buffer of SiON and a conductive etch stop of Cr sandwiched between the SiON repair buffer film and the Mo/Si multilayer mirror deposited on a Si wafer. However, to increase the process latitude, the Cr etch stop needs to be removed from the stack, in particular for mask repair. The absorber layer was patterned using commercial DUV resist and the pattern was transferred using reactive ion etching (RIE) with halogen-based gases. Completed masks exhibited negligible shift in the centroid wavelength of reflectivity and less than 2% loss in peak reflectivity due to mask patterning. Completed masks were exposed at Sandia National Laboratories' 10X EUV exposure system and equal lines and spaces down to 80 nm were successfully printed. The masks were also imaged in a microscope with 248 nm wavelength, and the focused ion beam repair selectivity to the buffer layer (SiON) was established. The paper summarizes the mask fabrication process, EUV printability, mask repair, inspection and emissivity for EUVL masks with Cr absorber.
Inspection and repair of defects represent some of the challenges for the fabrication of 'defect-free' alternating phase-shift masks needed for performance improvements in patterning the polysilicon gate layer of integrated circuit devices. Inspection, metrology, repair, and printability of defects on dark-field alternating phase-shift masks used in dual exposure processes for polysilicon gate layer patterning are discussed in this study. The impact of phase and chrome defects on photoresist features printed at an exposure wavelength of 248 nm is evaluated and compared to the defect signals measured on a mask inspection tool operating at 364 nm. Experimental data on printability and inspection of programmed glass defects with several different phase errors as well as programmed chrome defects are compared to simulations. The effects of the exposure tool focus conditions on phase defect printability are discussed in detail. Phase defect contrast enhancement mechanisms that may enable improvements in phase defect detection during mask inspection using conventional inspection tools are also addressed. Finally, successful repairs of real glass bump defects are demonstrated.
In this paper, we will present our research work in EUVL mask absorber characterization and selection. The EUV mask patterning process development depends on the choice of EUVL mask absorber material, which has direct impact on the mask quality such as critical dimension (CD) control, and registration. EUVL mask absorber material selection consideration involves many aspects of material properties and processes. These include film absorption at EUV wavelength, film emissivity, film stress, mask CD and defect control, defect inspection contrast, absorber repair selectivity to the buffer layer, etc. The selection of the best candidate is non-trivial since no material is found to be superior in all aspects. In an effort of searching the best absorber materials and processes, we evaluated Al-Cu, Ti, TiN, Ta, TaN, and Cr absorbers. The comparison of material intrinsic properties and process properties allowed us to focus on the most promising absorbers and to further develop the corresponding processes to meet EUVL requirement.
While the use of phase shift masks can improve CD control and allow the patterning of smaller poly gate features, it also introduces new error terms for overlay. Four error terms are discussed: increased sensitivity of image placement to coma-type aberrations, image placement shifts resulting form phase errors, image placement shifts resulting from intensity imbalance between zero and 180 degrees shifter regions, and phase shift mask to trim mask overlay issues. These overlay issues become increasingly important for lower k1 patterning. Likewise, phase defect printability is magnified for lower k1 patterning, increasing the requirements for phase shift mask inspection and repair.
The final qualification of masks for extreme ultraviolet (EUV) lithography may require defect inspection utilizing EUV radiation. To properly address inspection of masks for the 0.07-micrometer technology generation targeted by EUV lithography, the overall defect sensitivity requirements and scaling trends in inspection of patterned masks are discussed. To achieve the data acquisition rates of several hundred megapixels/sec required during inspection of 0.07-micrometer technology masks and to maintain light intensities below the damage threshold of mask materials, simultaneous acquisition of the inspection signal from multiple pixels on the mask, rather than the serial pixel data collection currently used in many mask inspection tools, will become necessary. The high data rates needed for future mask inspection technologies impose requirements on the minimum pulse repetition rate of the light source used in the inspection and influence the EUV mask inspection system design options. EUV light sources that either produce continuous-wave radiation or operate at pulse repetition rates of at least 10 - 100 kHz will be needed for mask inspection relevant to EUV technology, assuming that data from 104 or more pixels can be measured in parallel. The average EUV light source power requirements for an at- wavelength, bright-field EUV mask inspection system are estimated to be on the order of 1 W. The basic technologies for sources, optics, and detectors needed for at-wavelength EUV mask inspection currently exist but significant efforts to develop the numerous system components would be necessary to implement practical EUV mask inspection tools.
In the last two years, we have developed tow Extreme UV (EUV) mask fabrication process flows, namely the substractive metal and the damascene process flows, utilizing silicon wafer process tools. Both types of EUV mask have been tested in a 10X reduction EUV exposure system. Dense lines less than 100 nm in width have been printed using both 0.6 micrometers thick top surface imaging resists and ultra-thin DUV resist. The EUV masks used in EUV lithography development work have been routinely made by using the current wafer process tools. The two EUV mask processes that we have developed both have some advantages and disadvantages. The simpler subtractive metal process is compatible with the current reticle defect repair methodologies. On the other hand, the more complex damascene process facilitates mask cleaning and particle inspection.
Extreme UV Lithography (EUVL) is one of the leading candidates for the next generation lithography, which will decrease critical feature size to below 100 nm within 5 years. EUVL uses 10-14 nm light as envisioned by the EUV Limited Liability Company, a consortium formed by Intel and supported by Motorola and AMD to perform R and D work at three national laboratories. Much work has already taken place, with the first prototypical cameras operational at 13.4 nm using low energy laser plasma EUV light sources to investigate issues including the source, camera, electro- mechanical and system issues, photoresists, and of course the masks. EUV lithograph masks are fundamentally different than conventional photolithographic masks as they are reflective instead of transmissive. EUV light at 13.4 nm is rapidly absorbed by most materials, thus all light transmission within the EUVL system from source to silicon wafer, including EUV reflected from the mask, is performed by multilayer mirrors in vacuum.
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