This paper presents a system-on-chip solution that acts as a companion to infrared focal plane arrays (IR-FPAs), providing them with precision references, regulated power supplies, clocks and timing signals, as well as sampling analog or digital outputs for signal conditioning, correction and processing. To serve a wide variety of infrared imaging detectors, the chip is designed in a fully configurable manner that allows users to program specifications of signals going to an FPA and implement any custom signal correction, processing and application-specific algorithms.
Xenics has developed a family of stitched SWIR long linear arrays that operate up to 400 KHz of line rate. These arrays
serve medical and industrial applications that require high line rates as well as space applications that require long linear
arrays. The arrays are based on a modular ROIC design concept: modules of 512 pixels are stitched during fabrication to
achieve 512, 1024 and 2048 pixel arrays. Each 512-pixel module has its own on-chip digital sequencer, analog readout
chain and 4 output buffers. This modular concept enables a long array to run at a high line rates irrespective of the array
length, which limits the line rate in a traditional linear array. The ROIC is flip-chipped with InGaAs detector arrays.
The FPA has a pixel pitch of 12.5μm and has two pixel flavors: square (12.5μm) and rectangular (250μm). The frontend
circuit is based on Capacitive Trans-impedance Amplifier (CTIA) to attain stable detector bias, and good linearity
and signal integrity, especially at high speeds. The CTIA has an input auto-zero mechanism that allows to have low
detector bias (<20mV). An on-chip Correlated Double Sample (CDS) facilitates removal of CTIA KTC and 1/f noise,
and other offsets, achieving low noise performance. There are five gain modes in the FPA giving the full well range
from 85Ke- to 40Me-. The measured input referred noise is 35e-rms in the highest gain mode. The FPA operates in
Integrate While Read mode and, at a master clock rate of 60MHz and a minimum integration time of 1.4μs, achieves the
highest line rate of 400 KHz.
In this paper, design details and measurements results are presented in order to demonstrate the array performance.
In this paper, we report about a family of linear imaging FPAs sensitive in the [0.9 - 1.7um] band, developed for high speed applications such as LIDAR, wavelength references and OCT analyzers and also for earth observation applications. Fast linear FPAs can also be used in a wide variety of terrestrial applications, including high speed sorting, electro- and photo-luminesce and medical applications. The arrays are based on a modular ROIC design concept: modules of 512 pixels are stitched during fabrication to achieve 512, 1024 and 2048 pixel arrays. In principle, this concept can be extended to any multiple of 512 pixels, the limiting factor being the pixel yield of long InGaAs arrays and the CTE differences in the hybrid setup. Each 512-pixel module has its own on-chip digital sequencer, analog readout chain and 4 output buffers. This modular concept enables a long-linear array to run at a high line rate of 400 KHz irrespective of the array length, which limits the line rate in a traditional linear array. The pixel has a pitch of 12.5um. The detector frontend is based on CTIA (Capacitor Trans-impedance Amplifier), having 5 selectable integration capacitors giving full well from 62x103e- (gain0) to 40x106e- (gain4). An auto-zero circuit limits the detector bias non-uniformity to 5-10mV across broad intensity levels, limiting the input referred dark signal noise to 20e-rms for Tint=3ms at room temperature. An on-chip CDS that follows the CTIA facilitates removal of Reset/KTC noise, CTIA offsets and most of the 1/f noise. The measured noise of the ROIC is 35e-rms in gain0. At a master clock rate of 60MHz and a minimum integration time of 1.4us, the FPAs reach the highest line rate of 400 KHz.
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