A. Gabor, T. Brunner, S. Bukofsky, S. Butt, F. Clougherty, S. Deshpande, T. Faure, O. Gluschenkov, K. Greene, J. Johnson, N. Le, P. Lindo, A. Mahorowala, H-J. Nam, D. Onsongo, D. Poindexter, J. Rankin, N. Rohrer, S. Stiffler, A. Thomas, H. Utomo
It is generally assumed that achieving a narrow distribution of physical gate length (Lpoly) for the poly conductor layer
helps improve power performance metrics of modern integrated circuits. However, in advanced 90 nm technologies,
there are other drivers of chip performance. In this paper we show that a global optimization of all variables is necessary
to achieve the optimum performance at the lowest leakage. We will also describe how systematic physical gate-length
variation can improve core matching in multicore designs.
This paper addresses a challenge to the concept of process window OPC (PWOPC) by investigating the dimensional control of effectively non-printing features to improve the process window (PW) of the primary layout. It is shown based on a double exposure (DE) alternating phase-shift mask (altPSM) process that neglecting the impact of final mask dimensions forming intermediate images in resist (which are subsequently removed with a second exposure) potentially leads to a significant variation in the available focus budget of neighboring linewidth-critical feature dimensions. Various rules-based and model-based options of introducing virtual OPC targets into the OPC flow are discussed as an efficient mean to allow the OPC to take process window considerations into account. The paper focuses especially on the mechanics of how in detail those virtual targets support the beneficial OPC convergence of affected edges. Finally, experimental proof is shown that introducing non-printing, virtual targets being considered as actual targets during OPC ensures enhanced through focus line width stability and hence making the OPC solution well aware of process window aspects.
The ability to extend 193 nm lithography resolution depends on increasing the numerical aperture (NA) of the exposure system, resulting in smaller depth of focus, which subsequently requires use of thinner photoresists. Bottom antireflective coatings (BARCs) are a necessity, but the organic composition of current 193 nm BARCs offers poor etch selectivity to the photoresist. As a result, image transfer with thin resists is becoming increasingly difficult. It is also more challenging to control reflectivity at high numerical apertures with a thin, single layer BARC.
To address these issues, IBM has developed a new class of silicon containing BARCs. These materials exhibit high etch selectivity that will significantly improve the performance of high NA 193 nm lithography. The incorporation of silicon in the backbone of the polymers comprising these BARCS affords a high etch selectivity to conventional organic resists and therefore these polymers can be used as thick planarizing BARCs. The optical constants of these BARCs have been tuned to provide good reflectivity control at NA > 1.2 These materials can also be used as part of a dual layer BARC scheme composed of the thin organosilicon based BARC coated over a planarizing organic underlayer. This scheme has also been optically tuned to provide reflectivity suppression at high incident angles. By utilizing a thick BARC, a novel contact hole shrink process is enabled that allows tapering of the sidewall angle and controlling the post-etch critical dimension (CD) bias. Structures of the silicon containing polymer, formulation chemistry, optical tunability, lithography at high NA and RIE pattern transfer are reported.
With the nominal gate length at the 65 nm node being only 35 nm, controlling the critical dimension (CD) in polysilicon to within a few nanometers is essential to achieve a competitive power-to-performance ratio. Gate linewidths must be controlled, not only at the chip level so that the chip performs as the circuit designers and device engineers had intended, but also at the wafer level so that more chips with the optimum power-to-performance ratio are manufactured. Achieving tight across-chip linewidth variation (ACLV) and chip mean variation (CMV) is possible only if the mask-making, lithography, and etching processes are all controlled to very tight specifications.
This paper identifies the various ACLV and CMV components, describes their root causes, and discusses a methodology to quantify them. For example, the site-to-site ACLV component is divided into systematic and random sub-components. The systematic component of the variation is attributed in part to pattern density variation across the field, and variation in exposure dose across the slit. The paper demonstrates our team's success in achieving the tight gate CD tolerances required for 65 nm technology. Certain key challenges faced, and methods employed to overcome them are described. For instance, the use of dose-compensation strategies to correct the small but systematic CD variations measured across the wafer, is described. Finally, the impact of immersion lithography on both ACLV and CMV is briefly discussed.
Photoresist line edge roughness (LER) has been highlighted to have an adverse impact on device performance whereas post-etch LER is probably the more relevant metric. Post-etch LER can be reduced by migrating to thicker photoresist films or developing etch processes that are accompanied with lower energy ion bombardment. However, the photoresist and etching processes chosen might have desirable attributes and therefore cannot be changed, e.g. large process window or minimal nested-isolated feature etch bias. In this paper, we demonstrate the reduction of LER at the polysilicon gate level by an inexpensive treatment prior to etch. This HBr plasma treatment can be performed in the main etch chamber with minimal impact on wafer throughput. As a result, during the following etch steps, the photoresist mask is more homogeneous from an etch perspective which in turn helps lower the final LER. In addition, results from blanket etch studies on the various photoresist component films are shown. FTIR spectra of unetched and etched films are compared to demonstrate the preferential etching of certain photoresist/polymer components. The large differences observed in the unetched and etched film surface roughness values for certain photoresist components is postulated as an important source of final LER.
Line edge roughness (LER) remains a predominant measure of pattern quality used to evaluate processing parameters throughout the many steps of fabricating microelectronics. In the effort to minimize LER, a critical component is a metrology capable of rapid and non-destructive characterization of fluctuations in the position of the pattern, or line, edge. Previously, we have demonstrated a non-destructive metrology capable of sub-nm precision in the measurement of pitch and linewidth termed Critical Dimension Small Angle X-ray Scattering (CD-SAXS). Here, we explore the capability of CD-SAXS to measure line edge fluctuations using the diffuse scattering from diffraction peaks. Models of varying forms of line edge roughness are used to explore the effects of different types of line edge roughness on CD-SAXS results. It is found that the frequency and the degree of correlation of the roughness between patterns greatly influences the scattering pattern predicted. Model predictions are then compared to CD-SAXS results from a photoresist grating.
The mask fabrication industry is slowly migrating to chemically amplified (CA) resists to take the advantages of their high contrast, resolution, and sensitivity. During this migration process, the industry has encountered several problems associated with CA resists such as baking homogeneity of thick mask plates on hot plates, footing on Cr masks, and storage stability of mask blanks. In addressing these issues, we have adopted a low Ea CA resist platform to overcome the bake latitude issue. The resist formulation has been reformulated to reduce the footing and a new package method has been introduced to extend the storage of the blanks. In addition, we will also discuss our studies on two major areas, such as sensitivity and etch resistance, which we think is extremely important for E-beam resists in the future. The mask industry started with 248nm DUV CA resist systems and then found out that there was a need for even higher sensitivity resist systems to address the throughput issue. In our early study, we have observed that by simply increasing photoacid generator loading in the resist formulation we were able to increase the sensitivity, but there was a significant reduction in the dose latitude. After studying the dissolution and inhibition properties of different PAGs, we have been able to optimize PAG and base loading in combination with proper choice of PAGs to achieve high sensitivity and large dose latitude. The new resist formulation exhibits a large dose latitude of 38% for 100 nm l/s images with high sensitivity of 4.4μC/cm2 at 100 kV. Due to the electron scattering effect and the image collapse issues with thicker resists, thinner imaging layer is desirable. Sufficient etch selectivity is needed to compensate the insufficient resist thickness. Therefore, there is a need to develop a high Cl2/O2 RIE (used in Cr etch process) etch resistant resist system for mask making. We have reported earlier that a resist formulation based on blending KRS-XE with SSQ polymer has resolved 50nm l/s resist images with etch rate 20% better than conventional novolak I-line resist systems. Since then, we have investigated a few new SSQ polymers and found some lithographic improvement in this new blending systems due to better compatibility of the SSQ polymer to the KRS-XE.
With wireless communications becoming an important technology and growth engine for the semiconductor industry, many semiconductor companies are developing technologies to differentiate themselves in this area. One means of accomplishing this goal is to find a way to integrate passive components, which currently make up more than 70% of the discrete components in a wireless handset, directly on-chip thereby greatly simplifying handsets. While a number of technologies are being investigated to allow on-chip integration, microelectromechanical systems technologies are an important part of this development effort. They have been used to create switches, filters, local oscillators, variable capacitors, and high-quality inductors, to name a few examples. The lithography requirements for these devices are very different than those found in standard semiconductor fabrication with the most important involving patterning over extreme topography. We discuss some of the fabrication challenges for these devices as well as some approaches that have been demonstrated to satisfy them.
While evaluating 193 nm, and early versions of 157 nm and EUV resists, the lithography community has focused on post-develop LER values derived from image analysis of top-down SEM micrographs. These numbers, however, do not capture the tendency of a resist to facet and roughen during plasma etching processes. They also do not convey any information about the role of the anti-reflective coatings/hard masks in the transfer of resist roughness into the underlying substrate. From a manufacturing perspective, it is the "LER" of the final etched substrate that is more important. This paper systematically studies the impact of resist polymer platform and thickness, etching conditions, and presence of organic and inorganic anti-reflective coatings/hard masks on substrate roughening. An AFM technique, previously developed by Reynolds and Taylor, is used to measure the feature sidewall roughness as a function of etch depth. This technique enables us to calculate the sidewall roughness of the resist, ARC/hard mak and substrate surfaces simultaneously, and determine correlations that may exist between these values. The paper identifies and demonstrates patterning methodologies that can be used to achieve "smooth" substrate surfaces even when the resist is "thin".
The importance of hardmask technology is becoming increasingly evident as the demand for high-resolution imaging dictates the use of ever-thinner resist films. An appropriately designed etch resistant hardmask used in conjunction with a thin resist can provide the combined lithographic and etch performance needed for sub-100 nm device fabrication. We have developed a silicon-based, plasma-enhanced chemical vapor deposition (PECVD) prepared material that performs both as an antireflective coating (ARC) and a hardmask and thus enables the use of thin resists for device fabrication. This ARC/hardmask material offers several advantages over organic bottom antireflective coatings (BARC). These benefits include excellent tunability of the material's optical properties, which allows superior substrate reflectivity control, and high etch selectivity to resist, exceeding 2:1. In addition, this material can serve as an effective hardmask etch barrier during the plasma etching of dielectric stacks, as the underlying silicon oxide etches eight times faster than this material in typical fluorocarbon plasma. These properties enable the pattering of features in 1-2 μm dielectric stacks using thin resists, imaging that would otherwise be impossible with conventional processing. Potential extendibility of this approach to feature sizes below 100nm has been also evaluated. High resolution images as small as 50nm, have been transferred into a 300nm thick SiO2 layer by using Si ARC/hardmask material as an etch mask. Lithographic performance and etch characteristics of a thin resist process over both single layer and index-graded ARC/hardmask materials will be shown.
Extending 193nm lithography to well below 100nm resolution will depend on high NA tooling coupled with thin resist processing. Semiconductor manufacturing uses BARC's (Bottom Antireflective Coating) based on organic spin coatable polymers, to improve the resolution by absorbing light that otherwise will be reflected back into the resist. However, the use of organic BARC's for patterning sub 100nm features will be limited due to poor etch selectivity to the photo resist. IBM has developed a new class of polymers that can function as planarizing BARC's. These materials show an etch selectivity to the photo resist in excess of 3:1 in fluorocarbon based ARC-open RIE chemistry. The hardmask properties of these materials for oxide open are equivalent to typical resists. Furthermore these materials can be implemented like organic ARC's and are stripped in resist strips available in manufacturing. Basic materials characterization data, optical tunability, lithographic performance with different resists, process window data, and complete integration schemes will be presented.
Recently, there is significant interest in using chemically amplified (CA) resists for electron beam (E-Beam) applications including mask making, direct write, and projection printing. CA resists provide superior lithographic performance in comparison to traditional non CA E-beam resists in particular high contrast, resolution, and sensitivity. Due to the electron scattering effect and the image collapse problem, thinner imaging layer is desirable. Sufficient etch selectivity is needed to compensate reduced resist thickness. Therefore, there is a need to have a high etch resistant resist system which can survive Cr etch (Cl2/O2RIE etchant) process in mask making. For device making, the thin film bilayer approach needs a resist that can withstand O2 etch for image transfer to the underlayer. We have found Si-O containing polymer has the etch characteristics for both applications. In the first approach, using a blend of KRS-XE and silsesquioxane polymer, we have been able to resolve resist images down to 50nm with etch rate 20% slower than conventional novolak I- line resist systems. In the second approach, we have investigated the copolymer of vinyl phenol and acrylate siloxy silane systems. Superior litho performance and etch properties have been observed. In this presentation, we will discuss the chemistry, the miscibility in blends, etch characteristics and lithographic performance of these resist systems.
As 193 nm resist moves into production with minimum feature sizes approaching 100nm, bilayer resist is being evaluated more closely for certain applications. Our polymer design has been evolving to meet tighter outgassing requirements. Optical density, etch resistance and dissolution behavior are other considerations. The protecting group used in our 248 nm bilayer is not useful for 193 nm lithography because of the high optical density contribution from Si-Si linkage. Silicon was incorporated into a COMA platform for the first generation polymer. Maleic anhydride is used to modulate dissolution characteristics. The first generation 193 nm bilayer was optimized to print 120 nm L/S patterns with an attenuated PSM on a 0.6 NA Nikon S302. We will describe next generation platforms that address silicon outgassing concern. The lithographic performance of these resists was evaluated on a 0.6 NA Nikon S302 with a dark field mask. Results for 280nm pitch (1:1 L/S) and 245 nm pitch (105 nm L, 140 nm S) lithography are presented. Also shown is result for a 245 nm pitch (1:1 L/S) and 210 nm pitch (1:1 L/S) on a 0.75 NA ASML PAS 5500/1100. Outgassing data generated at MIT Lincoln Laboratory will be discussed.
With wireless communications becoming an important technology and growth engine for the semiconductor industry, many semiconductor companies are developing technologies that differentiate themselves in this space. One means of accomplishing this goal is to find a way to integrate passive components, which currently make up over 70 percent of the discrete components in a wireless handset today, directly on-chip thereby greatly simplifying handsets. While a number of technologies are being investigated to allow on- chip integration, MEMS technologies are an important part of this development effort. They have been used to create switches, filters, local oscillators, variable capacitors and high quality factor inductors to name a few examples. The lithography requirements for these devices are very different than those found in standard semiconductor fabrication with the most importatnt involving pattern over extreme topography. In this paper, we discuss some of the fabrication challenges for these devices as well as some approaches that have been demonstrated to satisfy them.
This paper presents data obtained in developing a process using 193 nm lithography and the RELACS contact hole shrink technique. For the line/space levels, process windows showing resist performance using chrome on glass masks are presented. Data showing feature size linearity and the requirements for optical proximity correction (OPC) are presented. Some of the OPC trends observed are discussed and compared to results obtained using 248 nm lithography. Image shortening data also compares the results obtained in 193 and 248 lithography. Etch results for the new 193 resists are given and show the etch resistance of this relatively new class of photoresist materials. For contact hole and via levels, results using 193 lithography and COG masks show the importance of the mask error enhancement factor (MEEF), print bias and resolution. Due to the relative immaturity and performance of contact hole resists for 193 lithography, Clariant's RELACS process was investigated with 248 nm resists. In this process contact holes are printed larger than required and then reduced to the desired size by a chemical shrink process. Results obtained with 248 lithography using state of the art resists and phase shift masks are discussed. It was found that 140 nm contact holes with at least 0.5 micrometer depth of focus could be obtained. Cross sections and process windows are shown.
Silicon-containing bilayer thin-film imaging resists versus single layer resists for a variety of different mask types, from both a focus-expose window, etch selectivity, and process integration perspective are examined. Comparable lithographic performance is found for 248 nm single layer and bilayer resists for several mask levels including: a 135 nm dense contact/deep trench mask level, a 150 and 125 nm equal line space mask printed over trench topography, and dual damascene mask levels with both vias and line levels. The bilayer scheme is shown to significantly relax the dielectric to resist etch selectivity constraint for the case of a dense contact or trench hardmask level, where high aspect ratio dielectric features are required. Only a bilayer resist scheme in combination with a transfer etch process enables the line/space pattern transfer from the imaging layer to the bottom of a trench with a combined aspect ratio > 10. When the single layer resist depth of focus window is limited by both the topography and variations in the underlying dielectric stack thickness, as is the case for the dual damascene via and line levels, bilayer resist is shown to be a practical alternative.
Recently, there is a significant interest in using CA resists for electron beam (E-beam) mask making application. CA resists provide superior lithographic performance in comparison to traditional non CA E-beam resists in particular high contrast, resolution, and sensitivity. However, most current CA resists exhibit very large sensitivity to PAB and/or PEB temperatures resulting in significant impact on CD. In addition, image collapse issues associated with high aspect ratio patterning as well as electron scattering effects in low KeV tools necessitate thinner resists. Therefore, there is a need to have a high etch resistant resist system which can withstand the demanding chrome etch process. Previously, we reported on the KRS-XE resist which exhibits dry etch resistance comparable to the best deep UV resist and excellent lithographic performance and bake latitudes. No PEB is needed for this resist. In this paper, we report on an advanced KRS-XE resist formulation which exhibits dry etch resistance surpassing the industry standard, novolak, in the chrome etch process. This new resist also exhibits excellent lithographic performance - 50nm lines/space delineated and requires no PEB. This paper will highlight the lithographic and etch performance of this new resist.
There is currently tremendous interest in developing 157nm photoresists for imaging applications at 100nm and below. Due to the high VUV absorbance of the polymers used in 248 and 193 photoresists new materials are being investigated for applications at 157nm. In this report the characterization of a number of partially fluorinated polymers based on aromatic backbones will be described. Data on the absorbance, dissolution properties, solvent retention and acid diffusion characteristics of these systems will be presented.
193nm lithography will be the future technology for sub- 150nm resolution. As the dimensions get smaller, resist thickness is also needed to be reduced for better resolution and wider process window. Single layer 193nm resist, with thickness of less than 500nm, may not be able to satisfy some of the substrate etch requirement. With bilayer resist scheme, the thin resist offers the advantages of high resolution and good process window. The thick underlayer provides the etch resistance required for substrate etching. IBM has developed a silane substituted alternating copolymer based 193nm bilayer resist system and demonstrates sub-120nm resolution using Nikon 0.6NA stepper with Chrome on Glass (COG) mask. Lithographic performance and formulation optimizations of this 193nm bilayer resist as well as underlayer evaluation and some etch study will be discussed.
Patterning sub-150 nm features in dielectric stacks using single layer resist processes in conjunction with organic anti-reflective coatings (ARCs) is becoming very difficult. Typical organic ARC-open etch processes suffer from poor ARC-to-resist selectivities (~0.7), and are accompanied by critical dimension (CD) losses. The resist remaining is often not sufficient to prevent artifacts such as substrate microrevicing during subsequent etches. PECVD-Deposited titanium nitride and silicon oxynitride films have been investigated as ARC layers but their basic nature has caused residue formation at the resist/ARC interface. We have developed a PECVD-deposited material, TERA (Tunable Etch-Resistant ARC) that acts as an ARC at 248 nm and 193 nm wavelengths and provides excellent etch selectivity to resist surpassing those attained with organic ARCs. In addition, this material demonstrates excellent hard mask properties for subsequent dielectric etch steps. The optical properties of these films can be easily tuned to minimize substrate reflectance at either imaging wavelength by controlling the precursor composition and deposition conditions. The films are compatible with 248 nm and 193 nm resists - no footing, undercut or residue is observed during patterning. The films can be etched selectively to resist (selectivity ~2.5) that translates to less resist consumption during th ARC-open etch. Compared to resists, TERA demonstrates better etch resistance while patterning dielectric stacks - the silicon oxide-to-TERA Selectivity exceeds 8. In this paper, the excellent optical tunability and substrate reflectivity control achieved with TERA are discussed. Clean lithography using 248 nm, 193 nm and e- beam resists is shown. The etch characteristics of TERA in fluorocarbon and halogen-based plasma chemistries are discussed. Finally, the formation of 135 nm and 120 nm deep trench patterns in thick dielectric stacks using TERA in conjunction with commercial 248 nm and 193 nm resists, respectively is demonstrated. The extendability of this approach to pattern silicon without roughening or microrevicing using sub-200 nm thick resists is motivated.
Recently, there is significant interest in using CA resists for electron beam (E-Beam) applications including mask making, direct write, and projection printing. CA resists provide superior lithographic performance in comparison to traditional non CA E-beam resists in particular high contrast, resolution, and sensitivity. However, most current CA resists exhibit very large sensitivity to PAB and/or PEB temperatures resulting in significant impact on CD control. In addition, image collapse issues associated with high aspect ratio patterning as well as electron scattering effects in low KeV tools necessitate thinner resists. Therefore, there is a need to have a high etch resistant resist system that can withstand the demanding chrome etch process. Previously, we reported on the KRS-XE resist which exhibits dry etch resistance surpassing the industry standard, novolak, in the chrome etch process. This new resist also exhibits excellent lithographic performance - 75 nm lines/space and 55nm/110 space/lines delineated and requires no PEB. This paper will highlight the lithographic and etch performance of this new resist.
We have designed and developed a high resolution 193 nm bilayer resist system based on alternating copolymers of silane substituted norbornene and maleic anhydride. We have utilized a combination of acid labile silane functionalities and acid stable silicon groups in this resist development.
Bilayer thin film imaging is one approach to extend 248 nm optical lithography to 150 nm regime and beyond. In this paper, we report our progress in the development of a positive-tone bilayer resist system consisting of a thin silicon containing imaging layer over a recently developed crosslinked polymeric underlayer. The chemically amplified imaging layer resist is based on a novel dual-functional silicon containing monomer, tris(trimethylsilyl)silylethyl methacrylate, which in addition to providing etch resistance, also functions as the acid sensitive functionality. The stabilization of (beta) -silyl carboncation by silicon allows this moiety to serve as an acid sensitive protecting group. Thus high silicon content and high resist contrast are achieved simultaneously. Lithographic evaluation of the bilayer resist with a 0.63 NA and a 0.68 NA 248 nm exposure tool has demonstrated resolution down to 125 nm equal line/space features with a dose latitude of 16 percent and depth of focus (DOF) of 0.6 um. The dose latitude and DOF for 150 nm equal line/space features are 22 percent and 1.2 um, respectively. Finally, residue-free, ultra-high aspect ratio resist features have been obtained by O2 or O2/SO2 reactive ion etching using a high-density plasma etch system. The resist design, deprotection chemistry, lithographic and etch characteristics of the top layer, as well as the design of the new underlay, will be discussed.
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