In this paper we present a CAD tool capable of generating a variety of parallel prefix adders described in the VHDL
language. The VHDL code generated by the tool is synthesizable and the resulting adders can be used as design
components in an automatic or semi-custom design flow. In its current version the tool is able to generate arbitrary bit-size
prefix adders of the following types: Sklansky, Ladner-Fischer, Kogge-Stone, Han-Carlson, Brent-Kung and
Knowles.
This paper deals with an important problem encountered in automating VLSI wafer probing. In this automation, vision is used for accurately guiding and lowering a probe to make contact with the wafer. The variance of pixel values of the probe and experimental observations are employed for determination of contact beteween the probe and the wafer. Analytical expressions are derived in the paper for the variance of the pixel values of the object with a uniform background and the variation of these values with respect to the distance of the object from the surface is studied. This relationship is experimentally verified for the detection of touch, when the probe is approaching the target pad.
Access to the requested content is limited to institutions that have purchased or subscribe to SPIE eBooks.
You are receiving this notice because your organization may not have SPIE eBooks access.*
*Shibboleth/Open Athens users─please
sign in
to access your institution's subscriptions.
To obtain this item, you may purchase the complete book in print or electronic format on
SPIE.org.
INSTITUTIONAL Select your institution to access the SPIE Digital Library.
PERSONAL Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.