Optical phased arrays borrow concepts from radar phased array science and technology to provide non-mechanical beam steering of electromagnetic radiation in the far field. Like radar phased arrays, this is achieved through controlling the relative phases of individual emitters on the device. However, since the device size scales with the wavelength of the electromagnetic signal, moving from radar to optical signals involves a reduction in size by more than 4 orders of magnitude. As a result, optical phased arrays can be created on a compact, chip-scale platform. This is particularly of interest for inter-spacecraft communications where high bandwidth optical signals can be communicated in free-space from one location to another. Providing this functionality with a low SWaP, chip-scale device is crucial for space applications. Recently, many chip-scale optical phased arrays have been developed to provide non-mechanical beam steering of light at optical frequencies, including many demonstrations at the telecommunications wavelength of 1550 nm. Here we will discuss the existing demonstrations as well as highlight the tradeoffs between different designs. We will highlight the importance of spacing the emitters at a technologically challenging pitch that is half the operational wavelength in order to avoid the many negative effects of grating lobes, including power loss, steering range limitation, and the opportunities they provide for eavesdropping.
Polarization information is abundant in nature, including the underwater environment. Polarization of light in the underwater environment is due to light coming from both the sun and from the sky. Hence, the underwater polarization is primarily determined by light’s transmission from air to water and in-water scattering. In this talk, we will present a new framework to solve sun’s position (heading and elevation) using background underwater polarization information. Based on this data, the underwater geo location of an observer can be determined passively. Extensive experimental data will be presented in the talk to demonstrate the accuracy of this method.
The Advanced Computational Sensors Team at the Johns Hopkins University Applied Physics Laboratory and the Johns Hopkins University Department of Electrical and Computer Engineering has been developing advanced readout integrated circuit (ROIC) technology for more than 10 years with a particular focus on the key challenges of dynamic range, sampling rate, system interface and bandwidth, and detector materials or band dependencies. Because the pixel array offers parallel sampling by default, the team successfully demonstrated that adding smarts in the pixel and the chip can increase performance significantly. Each pixel becomes a smart sensor and can operate independently in collecting, processing, and sharing data. In addition, building on the digital circuit revolution, the effective well size can be increased by orders of magnitude within the same pixel pitch over analog designs. This research has yielded an innovative class of a system-on-chip concept: the Flexible Readout and Integration Sensor (FRIS) architecture. All key parameters are programmable and/or can be adjusted dynamically, and this architecture can potentially be sensor and application agnostic. This paper reports on the testing and evaluation of one prototype that can support either detector polarity and includes sample results with visible, short-wavelength infrared (SWIR), and long-wavelength infrared (LWIR) imaging.
The advanced imagers team at JHU APL and ECE has been advocating and developing a new class of sensor systems
that address key system level performance bottlenecks but are sufficiently flexible to allow optimization of associated
cost and size, weight, and power (SWaP) for different applications and missions. A primary component of this approach
is the innovative system-on-chip architecture: Flexible Readout and Integration Sensors (FRIS). This paper reports on
the development and testing of a prototype based on the FRIS concept. It will include the architecture, a summary of test
results to date relevant to the hostile fire detection challenge. For this application, this prototype demonstrates the
potential for this concept to yield the smallest SWaP and lowest cost imaging solution with a low false alarm rate. In
addition, a specific solution based on the visible band is proposed. Similar performance and SWaP gains are expected for
other wavebands such as SWIR, MWIR, and LWIR and/or other applications like persistent surveillance for critical
infrastructure and border control in addition to unattended sensors.
We present a bio-inspired system-on-chip focal plane readout architecture which at the system level, relies on an
event based sampling scheme where only pixels within a programmable range of photon flux rates are output.
At the pixel level, a one bit oversampled analog-to-digital converter together with a decimator allows for the
quantization of signals up to 26 bits. Furthermore, digital non-uniformity correction of both gain and offset
errors is applied at the pixel level prior to readout. We report test results for a prototype array fabricated in a
standard 90nm CMOS process. Tests performed at room and cryogenic temperatures demonstrate the capability
to operate at a temporal noise ratio as low as 1.5, an electron well capacity over 100Ge-, and an ADC LSB down
to 1e-.
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