Dr. Daniel V. Rabinkin Profile

Dr. Daniel V. Rabinkin

Staff Member at MIT Lincoln Lab

SPIE Involvement:

Author

Proceedings Article | 21 September 2007 Paper

A comparative evaluation of image background subtraction techniques

Ankit Jain, Daniel Rabinkin

Proceedings Volume 6697, 66970E (2007) https://doi.org/10.1117/12.732209

KEYWORDS: Digital filtering, Nonuniformity corrections, Optical filters, Statistical analysis, Infinite impulse response filters, Data processing, Finite impulse response filters, Staring arrays, Electronics, Electronic filtering

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Proceedings Article | 19 May 2005 Paper

A parallel real-time computing-cluster implementation of spotlight SAR processing

Bipin Mathew, Daniel Rabinkin

Proceedings Volume 5808, (2005) https://doi.org/10.1117/12.602760

KEYWORDS: Synthetic aperture radar, Radar, Image processing, Image resolution, MATLAB, Signal processing, Parallel computing, Antennas, Data processing, Image acquisition

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Proceedings Article | 26 October 2004 Paper

Missile signal processing common computer architecture for rapid technology upgrade

Daniel Rabinkin, Edward Rutledge, Paul Monticciolo

Proceedings Volume 5559, (2004) https://doi.org/10.1117/12.547765

KEYWORDS: Signal processing, Digital signal processing, Target detection, Image processing, Detection and tracking algorithms, Standards development, MATLAB, Commercial off the shelf technology, Signal to noise ratio, Software development

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Interceptor missiles process IR images to locate an intended target and guide the interceptor towards it. Signal processing requirements have increased as the sensor bandwidth increases and interceptors operate against more sophisticated targets. A typical interceptor signal processing chain is comprised of two parts. Front-end video processing operates on all pixels of the image and performs such operations as non-uniformity correction (NUC), image stabilization, frame integration and detection. Back-end target processing, which tracks and classifies targets detected in the image, performs such algorithms as Kalman tracking, spectral feature extraction and target discrimination. In the past, video processing was implemented using ASIC components or FPGAs because computation requirements exceeded the throughput of general-purpose processors. Target processing was performed using hybrid architectures that included ASICs, DSPs and general-purpose processors. The resulting systems tended to be function-specific, and required custom software development. They were developed using non-integrated toolsets and test equipment was developed along with the processor platform. The lifespan of a system utilizing the signal processing platform often spans decades, while the specialized nature of processor hardware and software makes it difficult and costly to upgrade. As a result, the signal processing systems often run on outdated technology, algorithms are difficult to update, and system effectiveness is impaired by the inability to rapidly respond to new threats. A new design approach is made possible three developments; Moore's Law - driven improvement in computational throughput; a newly introduced vector computing capability in general purpose processors; and a modern set of open interface software standards. Today's multiprocessor commercial-off-the-shelf (COTS) platforms have sufficient throughput to support interceptor signal processing requirements. This application may be programmed under existing real-time operating systems using parallel processing software libraries, resulting in highly portable code that can be rapidly migrated to new platforms as processor technology evolves. Use of standardized development tools and 3rd party software upgrades are enabled as well as rapid upgrade of processing components as improved algorithms are developed. The resulting weapon system will have a superior processing capability over a custom approach at the time of deployment as a result of a shorter development cycles and use of newer technology. The signal processing computer may be upgraded over the lifecycle of the weapon system, and can migrate between weapon system variants enabled by modification simplicity. This paper presents a reference design using the new approach that utilizes an Altivec PowerPC parallel COTS platform. It uses a VxWorks-based real-time operating system (RTOS), and application code developed using an efficient parallel vector library (PVL). A quantification of computing requirements and demonstration of interceptor algorithm operating on this real-time platform are provided.

Proceedings Article | 20 November 2001 Paper

Adaptive array beamforming with fixed-point arithmetic matrix inversion using Givens rotations

Daniel Rabinkin, William Song, M. Michael Vai, Huy Nguyen

Proceedings Volume 4474, (2001) https://doi.org/10.1117/12.448661

KEYWORDS: Very large scale integration, Computing systems, Chemical elements, Statistical analysis, Sensors, Matrices, Computer architecture, Radar, Signal processing, Electroluminescence

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Adaptive array systems require the periodic solution of the well-known w=R₁v equation in order to compute optimum adaptive array weights. The covariance matrix R is estimated by forming a product of noise sample matrices X:R=X^HX. The operations-count cost of performing the required matrix inversion in real time can be prohibitively high for a high bandwidth system with a large number of sensors. Specialized hardware may be required to execute the requisite computations in real time. The choice of algorithm to perform these computations must be considered in conjunction with the hardware technology used to implement the computation engine. A systolic architecture implementation of the Givens rotation method for matrix inversion was selected to perform adaptive weight computation. The bit-level systolic approach enables a simple ASIC design and a very low power implementation. The bit-level systolic architecture must be implemented with fixed-point arithmetic to simplify the propagation of data through the computation cells. The Givens rotation approach has a highly parallel implementation and is ideally suited for a systolic implementation. Additionally, the adaptive weights are computed directly from the sample matrix X in the voltage domain, thus reducing the required dynamic range needed in carrying out the computations. An analysis was performed to determine the required fixed-point precision needed to compute the weights for an adaptive array system operating in the presence of interference. Based on the analysis results, it was determined that the precision of a floating-point computation can be well approximated with a 13-bit to 19-bit word length fixed point computation for typical system jammer-to-noise levels. This property has produced an order-of-magnitude reduction in required hardware complexity. A synthesis-based ASIC design process was used to generate preliminary layouts. These layouts were used to estimate the area and throughput of the VLSI QR decomposition architecture. The results show that this QR decomposition process, when implemented into a full-custom design, provides a computation time that is two orders of magnitude faster than a state-of-the-art microprocessor.

Proceedings Article | 13 November 2000 Paper

Efficient architecture for a multichannel array subbanding system with adaptive processing

Daniel Rabinkin, Huy Nguyen

Proceedings Volume 4116, (2000) https://doi.org/10.1117/12.406513

KEYWORDS: Phased arrays, Signal processing, Receivers, Optical filters, Prototyping, Modulation, Sensors, Modulators, Signal to noise ratio, Finite impulse response filters

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Proceedings Article | 2 November 1999 Paper

Subband-domain signal processing for radar array systems

Daniel Rabinkin, Nicholas Pulsone

Proceedings Volume 3807, (1999) https://doi.org/10.1117/12.367634

KEYWORDS: Signal processing, Electronic filtering, Radar, Distortion, Digital filtering, Signal attenuation, Optical filters, Radar signal processing, Phased arrays, Modulation

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Proceedings Article | 24 October 1997 Paper

Optimum microphone placement for array sound capture

Daniel Rabinkin, Richard Renomeron, Joseph French, James Flanagan

Proceedings Volume 3162, (1997) https://doi.org/10.1117/12.284187

KEYWORDS: Signal to noise ratio, Sensors, Error analysis, Interference (communication), Acoustics, Signal attenuation, Statistical analysis, Monte Carlo methods, Environmental sensing, Signal processing

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Proceedings Article | 22 October 1996 Paper

DSP implementation of source location using microphone arrays

Daniel Rabinkin, Richard Renomeron, A. Dahl, Joseph French, James Flanagan, Mike Bianchi

Proceedings Volume 2846, (1996) https://doi.org/10.1117/12.255464

KEYWORDS: Digital signal processing, Error analysis, Cameras, Imaging systems, Sensors, Interference (communication), Signal to noise ratio, Signal detection, Statistical analysis, Video

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Showing 5 of 8 publications

Conference Committee Involvement (2)

Advanced Signal Processing Algorithms, Architectures, and Implementations XIX

2 August 2009 | San Diego, California, United States

Advanced Signal Processing Algorithms, Architectures, and Implementations XVIII

10 August 2008 | San Diego, California, United States

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