When patterning critical layers at hyper NA, a multilayer antireflectant system is required in order to control
complex reflectivity resulting from various incident angles. Multilayer antireflectants typically consist of an
organic antireflectant and inorganic substrates. However, there are still some applications which need a single
organic antireflectant over high reflective substrates. A 2P2E application in double patterning is one of them.
Even though the pitch for double patterning is relatively loose, the reflectivity control is still challenging in terms
of profiles and overall process window. The optical constants and thickness of antireflectants should be well
optimized depending on applications. We have investigated several organic antireflectants for a single
antireflectant over high reflective substrates. The organic films differ in terms of n, k, thickness to cover both the
1st minimum and the 2nd minimum applications. The overall patterning performance including profiles and
process window has been evaluated. ASML 1900i was used to perform lithography. Simulation was performed
using ProlithTM software.
Most semiconductor companies are using Bottom Anti-Reflective Coating (BARC) on their lithography process to
reduce bottom reflectivity, which is cause of standing wave, pattern collapse, and bad pattern profile, and to improve
lithographic performance. BARC has been diversified to adapt to the wavelength of exposure light and refractive indices
of photoresists and substrates. Recently, many semiconductor companies introduce new process, such as immersion
process and double patterning process, to get high resolution for next generation semiconductor and they are trying to
apply these processes to their mass production. Among those process solutions, a strong candidate for high resolution is
introduction of hyper NA(Numerical Aperture) exposure tool, using immersion process. There is one thing to solve for
BARC material when immersion process is applied. It is reflectivity. As NA of exposure tool increases, reflectivity from
a substrate also increases, simultaneously. We simulated the difference of reflectivity with increasing NA and we found a
proper way how to control reflectivity on immersion process with refractive indices of BARC. We will report simulation
data for immersion process and introduce our new developed BARC for hyper NA process in this paper.
KEYWORDS: Reflectivity, Photoresist materials, Etching, Immersion lithography, System on a chip, Lithography, Polarization, Carbon, Process control, Polymers
The extension of current 193nm immersion lithography technology is depending on increasing the numerical aperture
(NA). High-resolution imaging requires the decrease of photoresist thickness to compensate for smaller depth of focus
(DOF) and prevent pattern collapse. Poor etch selectivity between photoresist and BARC reads to the use of thinner
BARC with faster etch-rate.
Also, controlling reflectance over a wider range of incident angles for hyper-NA above 1.0 gives more challenge for
thin BARC. To reduce substrate reflectivity, various material strategies (dual-layer BARC such as organic/inorganic
BARC or organic/organic BARC, Si-based ARC/spin-on carbon (SOC), and so on) have been introduced through many
papers. Organic dual-layer BARC is capable of suppressing reflectivity through wide range of incident angles. But,
the inevitable increase of its thickness is not a desirable direction due to the decreasing trend of photoresist thickness.
When amorphous carbon (a-C) is used as a hardmask for sub-stack, the combination of organic/inorganic BARC (i.e.
SiON) is currently well known process. Si-ARC/SOC may be the promising candidates of hardmask because Si
component of Si-ARC affords a high etch selectivity to photoresist and its combination with SOC decreases reflectance.
The optical constants of above organic materials can be tuned to control the substrate reflectivity for hyper-NA.
Small contact holes are the most difficult structures for microlithography to print because it is sensitively affected by the process condition, pattern density and environment as well. Moreover, the patterning of very small contact hole features for the 60nm node DRAM device generation will be a difficult challenge for 248nm lithography. However, we have already demonstrated the applicability of thermal flow resist to print 80nm contact holes for DRAM device using 248nm lithography in previous studies. In this work, we study the potential for contact photoresist reflow to be used with 248nm photoresist to increase process windows of small contact dimensions at the 60nm node DRAM device generation (0.21 k1). With KrF 0.80NA scanner, resist flow process and layout optimization were carried out to achieve the contact hole patterning. And also the exposure condition was optimized. For a contact hole with CDs of 69nm +/- 10%, Focus-Exposure windows over the wafer are 0.25μm and 8%, respectively. In conclusion, we have successfully achieved the contact hole patterning with KrF resist flow process for the 60nm node DRAM device.
One of the crucial tasks of semiconductor process is reduction of manufacturing cost by shrinking the design rule with the help of fine patterning technologies. For high density DRAM application, we explored 0.29 k1 lithography with KrF 0.80NA scanner. Well-known lithography technologies such as asymmetric crosspole, dipole illumination and 6% attenuated PSMs were used for this experiment. Illumination source and mask layout optimization were carried out iteratively to meet CD target, and high contrast thin resist was applied to improve pattern fidelity. Some of the biggest challenges were coping with large MEEF and reducing simulation error. Abnormal non-open fail, probably due to large MEEF, was observed at a dense contact hole pattern. To cope with non-open fail, we tested multi-PSM which composed of alternating PSM along the x-axis direction and 6% attenuated PSM along the y-axis direction. Also we pushed sigma offset of illumination pupil more strongly than exposure tool's specification and there was no serious drawbacks of partial coherency extension. Accurate partial coherence measurement was important for obtaining target CDs and reducing OPC error. For some layers, unexpected simulation error was occurred especially at the patterns of peripheral circuit, therefore we had to calibrate simulation parameters of in-house tool and commercial tool (Solid-C) for OPC simulation. Finally we successfully demonstrated 0.29k1 KrF lithography by showing process yield over 58% in 512Mb DRAM having design rule of 90nm. Based on the results we obtained, we can conclude that 0.29k1 lithography is quite feasible for mass production and 60nm design rule DRAM devices can be manufactured with ArF dry 0.93NA. Since dry 0.93NA corresponds to 1.33NA in ArF water immersion with respect to k1, we can expect that it is possible to fabricate 42nm DRAM devices with ArF immersion lithography.
Currently, 193nm lithography including contact hole patterning is being integrated into manufacturable process at 80nm technology nodes. However, for 193nm contact hole patterning, many researchers have reported various troubles such as poor profiles, low exposure dose, and pattern edge roughness due to inherent flaws of ArF resist materials. Also, it is desirable to be extended the KrF lithography at a cost. Of course, the patterning of very small contact hole features for the 80nm DRAM device generation will be a difficult challenge for 248nm lithography. In this work, we study the potential for contact photoresist reflow to be used with 248nm photoresist to increase process windows of small contact dimensions at the 80nm DRAM device generation. In KrF 0.80NA scanner, resist flow process and layout optimization was carried out to achieve the contact hole patterning. The contact CD at best focus is 140nm and the amount of photoresist flow is approximately 52nm. For a contact hole with CDs of 88nm +/- 10%, Focus-Exposure windows over the wafer are 0.3um and 10%, respectively. In conclusion, we have successfully achieved the contact hole patterning with KrF resist flow process for 80nm DRAM device.
In this paper, we will discuss the limitation of optical lithography with various resolution enhancement technologies. Lithography simulation was done by Hynix OPC Simulation Tool (HOST) based on Diffused Aerial Image Model (DAIM). The effects of numerical aperture (NA), wavelength, illumination conditions, mask and diffusion length of acid were simulated in view of resolution improvement. Diffusion length of acid is a dominant factor for resolution improvement for sub-100 nm era. As pattern size decreased, the limitation of optical lithography is more affected by diffusion length of acid. And other factors (NA, wavelength, illumination conditions and mask) will be discussed. Finally, ultimate the limitation of lithography will be discussed analytically.
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