We are characterizing a 7638 x 5004 front-side illuminated CMOS detector for astronomical application. Mod- ulation Transfer Function (MTF) of a detector is considered as an important figure of merit for accurate target positioning in astronomy. It states the upper limit of the image quality. MTF knowledge also provides a better understanding of the design trade-off. In this work, two-dimensional (2D) sub-micrometer scanning method is used to extract 2D MTF profile of our CMOS detector with a pixel pitch of 6μm. Our optical measurement setup focuses a collimated beam onto the imaging surface with a microscope objective. The spot was scanned in a raster over a single pixel. We generate an oversampled point spread function (PSF) of the detector which contains sub-pixel elements. 2D MTF map is calculated from the measured oversampled PSF. This 2D MTF map is used to characterize the resolving ability of our detector. We analyze the importance of the 2D MTF map to describe the full pixel MTF of the CMOS pixel having low fill-factor. 1D MTFs are calculated from the 2d MTF to do a quantitative comparison of the MTF in horizontal and vertical directions. This study emphasizes advantages and necessity of the 2D MTF for CMOS detector performance analysis, especially for anisotropic resolution.
In past decade, CMOS imagers are becoming increasingly popular in scientific imaging like astronomy. Large format image sensors are the detector of choice for the wide field imaging. The circuit integration capability of the CMOS imager is considered as an advantage while inducing the temperature variation over the sensor area. Dark current of the image sensor is strongly temperature-dependent signal and one of the limiting factors of the low light imaging. Here, we present per-pixel dark current measurement results and analysis of a 7638 x 5004 pixels front-side illuminated CMOS image sensor with a pixel pitch of 6 μm. In this work, global non- uniformity induced by the on-chip temperature variation is controlled by the Peltier junction device. This paper reports results of our dark current study for the temperature range 233 to 273 K with exposure of 0 to 300 s. A reasonably low dark current of 0.014 e-/pixel/s is achieved at 233 K temperature. The dark current spatial distributions at different temperatures are presented. We extracted the activation energy for the dark current in this lower temperature range. Using the Arrhenius law, dark current data analysis shows the Meyer-Neldel Relationship (MNR) between the Arrhenius pre-factor and the apparent activation energy.
Inter-pixel crosstalk degrades the point spread function (PSF) of a scientific imager which affects quantitative interpretation of scientific image data. Compared to the CCD, crosstalk is larger in the CMOS image sensor. This problem is challenging due to constant downscaling of the CMOS technology and pixel size. In this work, we parametrized the inter-pixel crosstalk and also modeled it as an empirically quantifiable kernel. A CMOS image sensor with 6 μm pixel pitch is measured. Evidently the crosstalk value can change with the PSF centroid position inside a pixel, primarily due to the spatial extent of the beam, which causes some optical generation in the surrounding pixels. We demonstrate a crosstalk measurement method and its spatial variation with respect to the spot position. This sub-pixel scanning is conducted to measure any crosstalk variation with respect to the sub-pixel spot position. Notable asymmetry on the crosstalk value between rows and columns as well as in the four corners of the POI is observed. This variation shows how the signal is shared at the pixel boundaries. Several POIs (Pixel of interest) over the scan region are measured to analyze the crosstalk variations.
Europe has currently no full supply chain of CMOS image sensors (CIS) for space use, certainly not in terms of image sensor manufacturing. Although a few commercial foundries in Europe manufacture CMOS image sensors for consumer and automotive applications, they are typically not interested in adapting their process flow to meet high-end performance specifications, mainly because the expected manufacturing volume for space imagers is extremely low.
CMOS imagers are becoming increasingly popular in astronomy. A very low noise level is required to observe extremely faint targets and to get high-precision flux measurements. Although CMOS technology offers many advantages over CCDs, a major bottleneck is still the read noise. To move from an industrial CMOS sensor to one suitable for scientific applications, an improved design that optimizes the noise level is essential. Here, we study the 1/f and thermal noise performance of the source follower (SF) of a CMOS pixel in detail. We identify the relevant design parameters, and analytically study their impact on the noise level using the BSIM3v3 noise model with an enhanced model of gate capacitance. Our detailed analysis shows that the dependence of the 1/f noise on the geometrical size of the source follower is not limited to minimum channel length, compared to the classical approach to achieve the minimum 1/f noise. We derive the optimal gate dimensions (the width and the length) of the source follower that minimize the 1/f noise, and validate our results using numerical simulations. By considering the thermal noise or white noise along with 1/f noise, the total input noise of the source follower depends on the capacitor ratio CG/CFD and the drain current (Id). Here, CG is the total gate capacitance of the source follower and CFD is the total floating diffusion capacitor at the input of the source follower. We demonstrate that the optimum gate capacitance (CG) depends on the chosen bias current but ranges from CFD/3 to CFD to achieve the minimum total noise of the source follower. Numerical calculation and circuit simulation with 180nm CMOS technology are performed to validate our results.
Global shutter imagers expand the use to miscellaneous applications, such as machine vision, 3D imaging, medical imaging, space etc. to eliminate motion artifacts in rolling shutter imagers. A low noise global shutter pixel requires more than one non-light sensitive memory to reduce the read noise. But larger memory area reduces the fill-factor of the pixels. Modern micro-lenses technology can compensate this fill-factor loss. Backside illumination (BSI) is another popular technique to improve the pixel fill-factor. But some pixel architecture may not reach sufficient shutter efficiency with backside illumination. Non-light sensitive memory elements make the fabrication with BSI possible. Machine vision like fast inspection system, medical imaging like 3D medical or scientific applications always ask for high frame rate global shutter image sensors. Thanks to the CMOS technology, fast Analog-to-digital converters (ADCs) can be integrated on chip. Dual correlated double sampling (CDS) on chip ADC with high interface digital data rate reduces the read noise and makes more on-chip operation control. As a result, a global shutter imager with digital interface is a very popular solution for applications with high performance and high frame rate requirements. In this paper we will review the global shutter architectures developed in CMOSIS, discuss their optimization process and compare their performances after fabrication.
The Extreme Ultraviolet Imager (EUI) on-board the Solar Orbiter mission will provide image sequences of the solar atmosphere at selected spectral emission lines in the extreme and vacuum ultraviolet.
For the two Extreme Ultraviolet (EUV) channels of the EUI instrument, low noise and radiation tolerant detectors with low power consumption and high sensitivity in the 10-40 nm wavelength range are required to achieve the science objectives.
In that frame, a dual-gain 10 μm pixel pitch back-thinned 1k x 1k Active Pixel Sensor (APS) CMOS prototype has been tested during the preliminary development phase of the instrument, to validate the pixel design, the expected EUV sensitivity and noise level, and the capability to withstand the mission radiation environment.
Taking heritage of this prototype, the detector architecture has been improved and scaled up to the required 3k x 3k array. The dynamic range is increased, the readout architecture enhanced, the power consumption reduced, and the pixel design adapted to the required stitching. The detector packaging has also been customized to fit within the constraints imposed by the camera mechanical, thermal and electrical boundaries. The manufacturing process has also been adapted and back-thinning process improved.
Once manufactured and packaged, a batch of sensors will undergo a characterization and calibration campaign to select the best candidates for integration into the instrument qualification and flight cameras.
The flight devices, within their cameras, will then be embarked on the EUI instrument, and be the first scientific APSCMOS detectors for EUV observation of the Sun.
Global shutter image sensors offer significant advantages over rolling shutter imagers but their implementation needs careful consideration. Each pixel needs a storage element on which the signal is stored after the exposure period. To cope with low read noise requirements, it is essential that the pixel can still perform correlated double sampling or CDS. This requires a second memory element in the pixel, so that the reset reference level of the sense amplifier can be read before the charge is dumped onto the sense node. An important specification is the parasitic light sensitivity or shutter efficiency of the pixel. This is a measure how insensitive the memory cell in the pixel is to light. Depending on the pixel architecture, this may be especially difficult in combination with backside illumination. Other important pixel performance parameters related to pixel architecture are read noise and dark current. In this paper we will review global shutter pixel architectures, compare their performances and discuss future developments. We discuss the issues related to global shutter pixels for high dynamic range and backside illumination, and how the most advanced CMOS image sensor process technologies can offer new approaches.
The ESA/NASA Solar Orbiter mission, to be launched in 2017, will explore the Sun at a much closer distance
than any previous solar observatory. On board the spacecraft, a high-resolution magnetograph (PHI) will provide
two-dimensional measurements of the photospheric vector magnetic field and line-of-sight velocity. The
environmental conditions encountered during the mission, together with the stringent performance requirements
of the instrument, define the set of specifications for the camera system. A custom designed CMOS sensor (with
2048×2050 pixels) has been developed to fulfill the aimed radiation hardness and performance. This sensor must
demonstrate a cadence above 10 fps with a full-well capacity higher than 105 electrons in a 10-μm pixel pitch.
We report the characterization and qualification tests. The radiation test campaign has been completed up to
a TID of 150 krad(Si), proton fluence up to 4 × 1011 at 10 MeV and 2 × 1011 at 20 MeV, and with heavy ions
to check for latch-up and SEFI failures. In parallel, a radiation tolerant camera electronic readout system has
been built to control the sensor and readout images, digitize the data, and communicate with the data handling
system of the PHI instrument. In addition, we present the main issues related to the camera design and future
perspectives.
This paper describes a back-side illuminated 1 Megapixel CMOS image sensor
made in 0.18um CMOS process for EUV detection. The sensor applied a so-call
"dual-transfer" scheme to achieve low noise, high dynamic range. The EUV
sensitivity is achieved with backside illumination use SOI-based solution. The
epitaxial silicon layer is thinned down to less than 3um. The sensor is tested and
characterized at 5nm to 30nm illumination. At 17.4nm targeted wavelength, the
detector external QE (exclude quantum yield factor) reaches almost 60%. The
detector reaches read noise of 1.2 ph- (@17.4nm), i.e. close to performance of EUV
photon counting.
A 600 frames per second CMOS image sensor with 644 (H) x 484 (V) 7.4 μm 8-transistor global shutter pixels and
digital outputs is described, consuming 300 mW. The global shutter pixel architecture supports correlated double
sampling, resulting in a full well charge of 23,000 e-, a read noise of 12 e- RMS and a dynamic range of 65.6 dB. The
sensor is designed in 0.18 μm CMOS and its pixel, architecture and performance results are described in the article. A
chip scale ball grid array package was developed for this 1/3" optical format image sensor, resulting in a package size of
only 7 x 7 x 0.7 mm3 and a total weight of 70 mg.
This paper describes a 2.2 Megapixel CMOS image sensor made in 0.18 μm CMOS process for high-speed
machine vision applications. The sensor runs at 340 fps with digital output using 16 LVDS channels at
480MHz. The pixel array counts 2048x1088 pixels with a 5.5um pitch. The unique pixel architecture supports
a true correlated double sampling, thus yields a noise level as low as 13 e- and a pixel parasitic light
sensitivity (PLS) of 1/60 000. The sensitivity of the sensor is measured to be 4.64 Vlux.s and the pixel full well
charge is 18k e-.
We will present a 3044 x 4556 pixels CMOS image sensor with a pixel array of 36 x 24 mm2, equal to the size of 35
mm film. Though primarily developed for digital photography, the compatibility of the device with standard optics for
film cameras makes the device also attractive for machine vision applications as well as many scientific and highresolution
applications. The sensor makes use of a standard rolling shutter 3-transistor active pixel in standard 0.35 μm
CMOS technology. On-chip double sampling is used to reduce fixed pattern noise. The pixel is 8 μm large, has 60,000
electrons full well charge and a conversion gain of 18.5 μV/electron. The product of quantum efficiency and fill factor
of the monochrome device is 40%. Temporal noise is 35 electrons, offering a dynamic range of 65.4 dB. Dark current is
4.2 mV/s at 30 degrees C. Fixed pattern noise is less than 1.5 mV RMS over the entire focal plane and less than 1 mV
RMS in local windows of 32 x 32 pixels. The sensor is read out over 4 parallel outputs at 15 MHz each, offering 3.2
images/second. The device runs at 3.3 V and consumes 200 mW.
KEYWORDS: Camera shutters, High dynamic range imaging, Sensors, Diodes, CMOS sensors, Field effect transistors, Signal to noise ratio, Active sensors, Image sensors, Imaging systems
We present a 1.3 megapixel CMOS active pixel sensor dedicated to industrial vision. It features both rolling and synchronous shutter. Full frame readout time is 33 ms, and readout speed can be boosted by windowed region of interest (ROI) readout. High dynamic range scenes can be captured using the double and multiples slope functionality. All operation modes and settings can be programmed over a serial or a parallel interface.
A color CMOS image sensor has been developed which meets the performance of mainstream CCDs. The pixel combines a high fill factor with a low diode capacitance. This yields a high light sensitivity, expressed by the conversion gain of 9 (mu) V/electron and the quantum efficiency fill factor product of 28 percent. The temporal noise is 63 electrons, and the dynamic range is 67 dB. An offset compensation circuit in the column amplifiers limits the peak-to-peak fixed pattern noise to 0.15 percent of the saturation voltage.
The paper describes the result of the first phase of the ESPRIT LTR project SVAVISCA. The aim of the project was to add color capabilities to a previously developed monochromatic version of a retina-like CMOS sensor. In such sensor, the photosites are arranged in concentric rings and with a size varying linearly with the distance from the geometric center. Two different technologies were investigated: 1) the use of Ferroelectric Liquid Crystal filters in front of the lens, 2) the deposition of color microfilters on the surface of the chip itself. The main conclusion is that the solution based on microdeposited filters is preferable in terms of both color quality and frame rate. The paper will describe in more detail the design procedures and the test results obtained.
We describe a compact algorithm that can on the fly detect and correct isolated missing pixels in the output stream of an image sensor, without significantly degrading the image quality. The algorithm is in essence a small kernel non- linear filter. It is based on the prediction of the allowed range of gray values for a pixel, for the gray values of the neighborhood of that pixel. A few examples will illustrate the effect of the algorithm on realistic images.
Random access active pixel CMOS image sensors generally suffer from non-uniformity in their pixel outputs. This document describes a simple mixed analogue-digital integrated circuit for fixed-pattern-noise compensation. The method has been applied to the range of sensors developed by IMEC, and improves their operation beyond mere static noise suppression.
The paper presents a low cost, miniature sensor that is able to compute in real time (up to 1000 frames/sec) motion parameters like the degree of translation, expansion or rotation that is present in the observed scene, as well as the so-called time-to-crash (TTC), that is the time required for a moving object to collide with the sensor. The sensing principle is that of computing and analyzing the optical flow projected by the scene on the sensor focal plane, through a novel algorithmic technique, based on sparse sampling of the image and one-dimensional correlation. The hardware implementation of the algorithm is based on two custom VLSI chips: one is a CMOS image sensor, having nonstandard pixel geometry, while the other one is a digital correlator that computes at high speed the optical flow vectors. The high-level control and communication tasks are managed by a microcontroller, thus guaranteeing a high level of flexibility and adaptability of the sensor properties towards different application requirements and/or variable external conditions.
In this article we discuss the trade-offs for the design, fabrication and interfacing of fast pixel addressable (random-access) cameras. In order to benefit most from the random addressability, the interface must be optimized for access through a data bus/address bus structure. Measures to correct the camera's inherent non-uniformity must not slow down the interface speed.
We report on the design, design issues, fabrication and performance of a log-polar CMOS image sensor. The sensor is developed for the use in a videophone system for deaf and hearing impaired people, who are not capable of communicating through a 'normal' telephone. The system allows 15 detailed images per second to be transmitted over existing telephone lines. This framerate is sufficient for conversations by means of sign language or lip reading. The pixel array of the sensor consists of 76 concentric circles with (up to) 128 pixels per circle, in total 8013 pixels. The interior pixels have a pitch of 14 micrometers, up to 250 micrometers at the border. The 8013-pixels image is mapped (log-polar transformation) in a X-Y addressable 76 by 128 array.
Limitations inherent to the linear optical field assumption are discussed. A modified time-to-crash detector conception is proposed. The main features of our approach are a logarithmic compression of image in space, differentiation of the logarithm of light intensity in space and time, detecting local expansion using a nearest-neighbor logical circuitry, and an automatic choosing of the contour for the time-to-crash estimation.
Keywords: optical flow, smart sensor, CMOS image sensor, motion sensor
KEYWORDS: Sensors, Amplifiers, Transistors, Capacitance, Field effect transistors, Capacitors, Detection and tracking algorithms, Linear filtering, Photodiodes, Digital filtering
Limitations inherent to the linear optical field assumption are discussed. A modified time-to-crash detector conception is proposed. The main features of our approach are a logarithmic compression of image in space, differentiation of the logarithm of light intensity in space and time, detecting local expansion using a nearest-neighbor logical circuitry, and an automatic choosing of the contour for the time-to-crash estimation.
Two CMOS image sensor concepts, developed for motion extraction, are proposed. The algorithm implemented in each pixel is either: the calculation of the temporal variation of the difference of the logarithm of intensity in two adjacent pixels; or a more general implementation of the spatial and temporal filtering over the local neighborhood. Temporal differencing yields peak in the response of pixels with changing intensity. The spatial differencing provides high-pass filtering and invariance to time-varying external lighting. We also compare two ways to use this sensor module to compute the velocity of edges moving along the sensor. In one implementation, the sensor is used as an input for a correlation algorithm, calculating the optical flow vector. The other possibility is to detect motion locally in each pixel, and measuring the time of switching between adjacent pixels which detect the motion.
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