Nanoimprint lithography (NIL) is promising technology for next generation lithography for the fabrication of semiconductor devices. The advantages of NIL are simpler process, less design rule restriction, which lead to lower cost-of-ownership, compared with conventional optical lithography. NIL is one to one lithography and contact transfer technique using template. Therefore template quality variations impact on wafer performance directly. To introduce NIL technology to high volume manufacturing (HVM) of semiconductor devices, improvement of template quality is very important. In the situation of pattern size shrinking, it is necessary to improve CD uniformity and defectivity to achieve the target of HVM. So that high accuracy QA (Quality Assurance) tools are required to qualify CD uniformity and defectivity which are key metrics on high-end template development. In this paper, we show the current status of template development for sub15nm NIL. For the template fabrication, double patterning technologies were applied to extend pattern resolution limit. Template replication was also implemented by template replication system Canon FPA1100-NR2. Finally we will show QA examples for high accuracy template by using key metrics such as CD uniformity, defectivity and Cross-sectional profile.
It’s generally said that the management of particles is important. In DUV lithography, it’s needed to remove particles on photomask surface not to induce patterning defects on wafer. Moreover, in Nanoimprint lithography (NIL), particles on template cause not only patterning defects on wafer but also its own pattern collapse. Therefore, these particles have to be entirely removed from substrate surface with cleaning technology. In this paper, we proposed ‘Freeze Cleaning’ which has more than 99% PRE for 40nm SiN standard nanoparticle without pattern collapse and critical dimension (CD) shift. And it was also demonstrated that soft defects on template which remained after conv. cleaning could be removed with Freeze Cleaning. These results predict that Freeze Cleaning will contribute to progress of photomask and template technology to next stage.
Mask development process for 2x nm node devices needs stringent CD uniformity and CD linearity. To evaluate and
improve these CD qualities, we proposed to introduce electric-field-induced-development method into proximity gap suction
development system (PGSD). It is the way to develop with applying electric potential to the metallic development nozzle to
stimulate the movement of hydroxide ions. In this paper, we will report the effect of electric-field-induced-development
method on CD uniformity and CD linearity.
Development process for 3x nm node devices and beyond is becoming a great issue in mask
fabrication. The following items, such as uniformity, repeatability, loading effect and defect must be
improved. To evolve the development process, TEL, DNP Omron and Toshiba have been jointly
developed next generation equipment which is called "Second-generation PGSD (Gen.2)".
In this paper, PGSD Gen.2 concept is introduced and its performance is reported.
PGSD is one of the solutions as a developer of 70 nm node generation mask fabrication. To make 55 nm node generation mask, CD error induced by loading effect (loading-effect-induced CD error) must be reduced. As is generally known, primary cause of loading effect is dissolution products that hinder the progress of development.
We think that it is the key in development technology to control movement of dissolution products and to disperse dissolution products uniformly for minimizing the loading-effect-induced CD error.
In this paper, we propose a new concept and procedure to optimize the movement direction and the amount of dissolution products.
CD error caused by loading effect is becoming a significant issue in mask fabrication. At the same time, quantification method of CD error caused by loading effect has not been established in many cases because it is very difficult to measure the error according to various coverages. In previous studies, we presented the development equipment named PGSD (Proximity Gap Suction Development). PGSD can reduce loading error of development process by using of nozzles to spout developer and suck in dirty developer. However, in the case of using PGSD for development process, CD error caused by loading effect seems to still remain.
In this paper, we propose a new method to quantify the error caused by loading effect, and estimate the development-induced error out of total CD error. We evaluated 70 nm NAND mask by investigating the correlation between CD and coverage. Moreover, we discuss the residual CD error excluding the loading effect.
In recent years, more precise pattern dimension control (CD control) on a photomask has been required than ever as finer-line of IC pattern progresses. In the case of the conventional development (spray-development, puddle-development), CD control is difficult due to loading and micro-loading effect. The "loading and micro-loading effect" refers to the differences of exposed area around the pattern.
The low pattern density generates numerous dissolution products and decreases the concentration of developer. This phenomenon changes resist dissolution rate and causes difficulties in controlling the CD. To solve this problem, we have been developing a new type of developer, called "Proximity Gap Suction Development (PGSD)." Nozzle of PGSD has five slits; opening for supplying developer is in the center, two suction slits are on the both sides, and two slits for rinse are on the very end. The proximity gap is kept between the nozzle surface and resist during development. Contaminated developer is immediately sucked/removed and stable development can be achieved by the continuous dispense of fresh developer at high speed. Thus, a desired pattern size can be obtained without loading and micro loading effect. We reported the principle of PGSD at BACUS in 2002. In this thesis, we would like to report the following topics.
(1) System overview of α machine, which we are currently developing.
(2) Effect of the PGSD on CD uniformity and the number of defects.
The loading effect is becoming a great issue in mask fabrication. To reduce CD error due to resist load, we have developed a developer based on a new concept, Proximity Gap Suction Development (PGSD), involving the use of a nozzle to spout developer and suck in dirty developer. In this paper, the performance of PGSD is reported.
CDs of photomasks include errors caused by photomask-making processes, namely, writing process, baking process in chemically amplified resist, resist development process, and etching process. Recently, the conventional resist develop methods, such as spray development, have raised issues concerning uneven pattern density on photomasks. Dependency of resist coverage is caused by low solubility of developer containing dissolved resist. In the ideal development process, only fresh developer would be on the resist surface at all times. To realize this ideal development process, we propose a development method, Proximity Gap Suction Development (PGSD), based on a new concept. PGSD involves the use of a scanning nozzle having five slits located in its surface facing the resist surface, a scanning mechanism keeping proximity gap between resist surface and the nozzle surface with slits, and a photomask holder. The nozzle is scanned from end to end of photomask on the holder. Developer spouts from a center slit of the nozzle. Slits at both sides of the center slit suck developer on resist surface with rinse fluid spouting from slits located outside of suction slits on the nozzle. Because proximity gap is kept between resist surface and the nozzle surface, spouted fresh developer reaches resist surface directly and it runs over resist surface at high speed. Then, developer on resist surface is excluded immediately with rinse fluid by suction slits. PGSD can produce CDs of resist pattern controlled precisely on photomask having uneven pattern density. We report details of the PGSD system, and compare the results for CDs obtained by PGSD with those obtained using the conventional method.
In fabrication of next-generation photomask for devices under 100 nm, more precise control of critical dimension (CD) is required. Each process for the photomask fabrication must be developed corresponding to each requirement of CD accuracy. The same applies to post-exposure baking (PEB) and post-coat baking (PCB), and so more precise control of reaction amount in baking is required. Multiple zone-controlled type of hot plate to improve uniformity of temperature has been enthusiastically developed Generally, conventional hot plates don't directly control the temperature of resist film because its measurement means, for example, thermo-couples or resistance bulb are embedded near the surface of hot plate, and so cannot accurately control resist temperature. We think next-generation baking technology should involve direct measurement and control of the actual temperature of films. Furthermore, serious problems arose in that heat history in PEB was different in each pattern area, such as mask center or edge, and large overshooting of temperature was caused in photomask baking because heat capacity of quartz is very large and heat transfer speed of quartz is very slow. To solve this problem, it is necessary to control resist temperature directly by means of a quick response. It is difficult to satisfy this requirement with conventional bakers of the hot plate type or with such bakers to which a minor improvement has been made to achieve the quick response. To realize the quick response, the four following concepts are needed. (i) Quick response of heat source for resist film (ii) Direct measuring of temperature of resist film (iii) Shortening interval of feedback (iv) Improvement of repeatability ofmeasuring temperature We have studied a candidate next-generation baking technology for photomask fabrication, namely a novel baking system consisting of halogen lamps and non-contact type thermometers. We call this novel baking system "Lamp Heater System". In this paper, the heating performance is reported.
The electron beam (EB) writing system with high acceleration voltage must be used for the mask fabrication because of its fine resolution. In this case, the resist heating effect becomes one of the serious problems in CD control. This paper discusses the controllability of the resist heating effect and shows that; (1) The CD variation caused by the effect increases with higher pattern coverage and larger shot size, which supports qualitatively results of temperature simulation based on Ralf's model. (2) The multiple exposure is effective to suppress the temperature rise in a substrate and the CD variation. The shifting-type exposure is more effective than the non-shifting-type exposure for suppression of the effect. (4) The CD variation for ZEP7000 can be suppressed to less than 5.0 [nm] (range) provided the shot size is less than or equal to 1.0 [micrometer] and the shifting-type exposure is adopted. Thus, the resist heating effect can be controlled and the CD variation by the effect can be suppressed enough for fabricating the masks to produce 0.15 micrometer devices and beyond.
Defect specifications were studied for 0.200 and 0.175 micrometer rule memory cell patterns. Furthermore, we evaluated whether current inspection systems were capable of satisfying the defect specifications. For our evaluation, test masks with programmed defects in 0.200 and 0.175 micrometer rule memory cell patterns were fabricated using a variable shaped electron beam writing system and reactive ion etching. Recently, 0.250 micrometer rule devices have entered the mass- production phase using the defect specification based on the SIA roadmap. Accordingly, we assumed that the ratio of CD variations, corresponding to the defect size based on the SIA roadmap, to nominal sizes has no influence upon action of devices for 0.250 micrometer rule devices. Then, we also assumed that the ratio of CD variations has no influence upon action of not only 0.250 micrometer rule devices but also 0.200 and 0.175 micrometer rule devices. For 0.200 and 0.175 micrometer rule memory cell patterns, defect specifications were obtained by lithography simulations and exposure experiments for the criteria of the ratio of CD variations based on the assumption. We also evaluated whether current inspection systems were capable of satisfying the defect specifications.
In electron beam writing with high accelerating voltage on photomask blanks, resist heating effect, which is the main factor of CD error in a localized area, is one of the serious problem that must be solved or ameliorated. In this study, the dependence of CD error on the types of resists and the dependence of CD error on the writing conditions of EB writer, were investigated. In this experiment, ZEP7000 (Nihon Zeon), a typical standard of non-chemically amplified resist for electron beam and two chemically amplified resists (CARs) were selected. As a result, the CD error caused by the resist heating effect for the CARs was smaller than that for ZEP7000. The efficiency of multi-pass writing for all of the evaluated resists was observed. The multi-pass writing was very effective in reducing the CD error for both ZEP7000 and the CARs, and especially so for ZEP7000. The dependence of the CD error caused by the resist heating effect on the various writing parameters was investigated using Ralf's model simulation, which is the calculation tool of the temperature rise during the exposure of electron beam including the heat diffusion equation. The CD error for the CARs was smaller and more stable than that for ZEP7000 in various writing conditions. Current density and shot size influenced CD error in sub-field strongly, however, settling time of each shot don't almost influence CD error in sub-field for ZEP7000. The fact that the results for CARs, which have high sensitivity, didn't depend on the current density and shot size indicates the ability to fabricate more accurate mask with higher throughput.
Recently, next-generation mask fabrication processes have been actively examined for application with Electron Beam writing tools and chemically amplified resists. In this study, we used a variable shaped electron beam writing system with an accelerating voltage and chemically amplified resist to investigate the dependence of the CD error in a localized area of a 6025 mask on the process factors, with the goal of fabricating more accurate masks with improving sensitivity. Our results indicated that CD error in a localized area did not depend on the resist thickness. Higher sensitivity and CD uniformity were achieved simultaneously. Moreover, we could isolate the CD error caused by the resist heating effect is more apparent for higher doses than lower doses. However, a higher dose gives rise to a small CD change rate. In this experiment, the effect of the lower CD change rate at a higher dose counterbalances the resist heating effect. By decreasing CD error in a localized area, we obtained a CD uniformity of 14 nm in a 100 mm area on the mask.
CD uniformity to be patterned by electron-beam (EB) writing system with a variable-shaped beam was evaluated. The experimental EB writing system, EX-8D, was used under conditions of current density of 20 A/cm2 and acceleration voltage of 50 keV. Quartz reticles coated with positive tone resist ZEP7000TM (Nippon Zeon Co., Ltd.) were applied. Test patterns of 1-micrometer-width design were written by shaped beam shots of 1 micrometer square with different exposure doses. Since higher measurement repeatability was confirmed, line width of test patterns without shot stitching points was measured by Nikon XY-3I with a circle-spot probe of 1 micrometer. Line width of clear patterns on resist film was measured after development, and line width of clear patterns on chrome (Cr) film of one mask was measured at same points after wet-etching. The other mask was measured at the same points after dry-etching process by conventional reactive ion etching (RIE). Certain comparisons in this study indicate the importance of evaluating CD uniformity on Cr film after dry- etching process. Expect for resist heating contribution by four-pass writing method, the uncertainty of CD error was quantified as follows: 4 nm (3(sigma) ) on resist film at the applied dose of 19 (mu) C/cm2, and 4 nm (3(sigma) ) on Cr film at the applied dose of 27 (mu) C/cm2.
The effect of phase shift and transmittance fluctuation in a mask plate have been studied. The differences of these optical properties of halftone phase shift masks result in critical dimension(CD) error on a wafer so that these fluctuation in a plate reduce the process window across the exposure field. In considering CD error budget, such factors as phase shift and transmittance has to be taken into account. To estimate this budget, a set of test masks were fabricated, in which phase shift and transmittance are varied, and the exposures using these masks under the same conditions were performed.
The critical dimension uniformity required in the fabrication of photomasks for 1 gigabit DRAMs will be more stringent that 20 nm in terms of 3 sigma. High-voltage variable-shaped e-beam (VSB) writing is advantageous because of its high resolution, linewidth stability, and throughput performance. However, stitching errors in VSB writing have been a critical problem in the fabrication of advanced photomasks. In this paper, an improved method to calibrate the size of a VSB shot and reduce shot stitching errors is proposed. The accuracy of the calibration method depends on that of the linewidth measurement system, and shot-size calibration with an accuracy of +/- 10 nm can be achieved using existing measurement systems. The positioning accuracy of VSB shots was enhanced by a multiple pass exposure scheme. With these procedures applied to a 50 kV VSB system, the linewidth variation of a photomask in a local area such as a square region of 200 micrometers X 200 micrometers was reduced to less than 20 nm.
A set of deep UV attenuated phase shift masks (PSMs) was fabricated to clarify the correlation between PSM optical characters and the printing performance. A SiNx single-layer film was adopted as a phase shifter which works as an attenuator simultaneously. We fabricated nine PSM test masks in which both phase shift and transmittance were varied. In these masks, phase shift ranges from 176 to 205 degrees and transmittance ranges from 6.4 to 13.1%. The target feature size of the experiment was set to that of 256 M DRAM. Line/space patterns under 0.25 micrometer and the contact holes under 0.3 micrometer have been evaluated. The evaluation was made using an exposure-defocus window analysis from measured aerial images. Each mask was compared by the calculated depth of focus (DOF) at 10% exposure latitude. The experimental results show that shifter optical characters do not play an important role in case of line/space patterns. However, the phase shift error leads to serious reduction of DOF for hole patterns. In using high transmittance PSM, mask bias is inevitable to print under -0.30 micrometer hole patterns because of the side-lobe peak. To obtain the maximum DOF, mask bias should be decided with meticulous care.
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