Mr. Jean Denis Profile

Jean Denis

at Laser Components Canada Inc

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Publications (2)

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Proceedings Article | 12 March 2024 Presentation + Paper

Design and fabrication of optical waveguides for high-power density laser diodes for LiDAR applications

T.-M. Diallo, C. Rodriguez, J. Denis, E. Desfonds, J.-F. Boucher, M-S. Rouifed

Proceedings Volume 12867, 1286705 (2024) https://doi.org/10.1117/12.3002914

KEYWORDS: Design, Semiconductor lasers, LIDAR, Waveguides, High power lasers, Reliability, Fabrication, Electrooptics, Near field

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LiDAR (light detection and ranging) technology has gained significant importance in various fields, including autonomous vehicles, environmental monitoring, and remote sensing. 905nm pulsed laser diodes are an essential component of a LiDAR system, which performance relies heavily on the laser power level and the characteristics of its emitted light beam. While the fabrication of high-power pulsed laser diodes is already mature, reliably combining a high-power level and a concentration of the laser beam (⪆90%) within a limited emitting width is an ongoing challenge. Another major concern is the development of facet coatings capable of withstanding the high-power density generated by these lasers. Facet degradation due to the excessive optical power leads to a reduced laser efficiency and a risk of increased failure rates. Here, we have devised novel optical waveguide designs for triple junction 905nm lasers with optimized mode profiles and an effective confinement structure. This enables lasers to have a power density that is four (4) times higher than the traditional ones and, to confine most of the beam energy within an emitting width of less than 60 µm. Furthermore, our research explores innovative approaches to facet coatings that enhance facet durability and minimize power-induced degradation. This results in exceptionally reliable lasers, as demonstrated by a thousand hours of life test data. Through this work, we have achieved significant advancements in design and fabrication of high-power laser diodes for LiDAR applications. Experimental results demonstrate improved power efficiency, reliable facet coatings, and effective energy confinement within the desired emitting width.

Proceedings Article | 12 March 2024 Presentation + Paper

Deep ICP-RIE etched trenches with sidewall slope control of GaAs-based high-power 905nm pulsed laser diodes

Christophe Rodriguez, Jean Denis, Thierno Mamoudou Diallo, Eric Desfonds, Jean-François Boucher, M-Saïd Rouifed

Proceedings Volume 12867, 1286707 (2024) https://doi.org/10.1117/12.3001110

KEYWORDS: Etching, Semiconductor lasers, Wet etching, Waveguides, Microfabrication, Dry etching, Semiconducting wafers, Plasma, Near field optics

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The micro-fabrication process for advanced GaAs-based Pulsed Laser Diodes (PLDs) necessitates the precise etching of trenches for patterning waveguides. Traditionally, we employed wet etching in our approach, which, unfortunately, does not allow for precise engineering of waveguide trench geometry. The isotropic nature of wet etching results in a sidewall angle of approximately 45°. To enhance device performance, achieving a steeper angle without compromising other process steps dry etching is preferable. Ideally, trenches with sidewall angles ranging from 60° to 70° would strike an optimal balance. In pursuit of this goal, we initiated a Design of Experiment (DoE) to optimize the etching by Inductively Coupled Plasma - Reactive Ion Etching (ICP-RIE). Through this experimentation, we identified an ICP-RIE recipe capable of producing trenches with sidewall angles within the desired range (60° to 70°), exhibiting low roughness and attaining a depth of 17 μm. After this optimization, we applied the new ICP-RIE process to fabricate PLDs and conducted a comparative analysis against devices produced using our conventional wet etching method. The PLDs etched with ICP-RIE showcased slightly superior performance compared to those etched with wet etching. The implementation of ICP-RIE not only enhances device performance but also allows for a reduction in footprint per device. Consequently, this optimization contributes to an increased yield of devices per wafer, thus demonstrating the potential for scalability and improved efficiency in our micro-fabrication process.

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