We demonstrated a tunable long wavelength photodetector by using heteroepitaxy growth of InP-based
In0.53Ga0.47As-InP p-i-n structure on GaAs based GaAs/AlAs Fabry-Perot filter structure. High quality heterepitaxy was
realized by employing a thin low-temperature buffer layer. A wavelength tuning range of 10.0 nm, a quantum efficiency
of 23%, a spectral linewidth of 0.8 nm and a 3-dB bandwidth of 6.2 GHz were simultaneously obtained in the device.
Moreover, a Si based long wavelength photodetector with the same device structure was also fabricated successfully by
using Si/GaAs and GaAs/InP heteroepitaxy. Crack-free GaAs on Si and high-quality epilayer with area of
800μm×700μm was obtained by using mid-patterned growth and thermal-cycle annealing. The Si-based photodetector
with spectral linewidth of 1.1nm (FWHM) and quantum efficiency of 9.0% was demonstrated.
In this work, we reported the buffers optimum of high-quality InP epilayer grown on GaAs substrate for fabrication of InP-related devices. First, LT-GaAs (450°C, 15nm)/LT-InP((450°C, 15nm) double LT buffers were deposited on the substrate as the initial layers. The effects of double LT buffers were studied compared with the results of single LT-InP buffer scheme. It was demonstrated that: (i) with a proper LT-GaAs buffer thickness, the double
LT-buffer became more "compliant" for strain accommodation than single LT-InP buffer; (ii) there existed an optimal thickness of
LT-GaAs buffer for a given thickness of LT-InP layer at which the crystal quality reached the best, just like the conventional buffer optimum process. Second, in order to block the "escaped" dislocations from the buffer/substrate interface, InxGa1-xP/InP (x≈0.2) strained superlattices (SLS) were introduced as defect filtering layers before the growth of the final InP layer. We investigated the effects of the periods and inserting position of the SLS on the stress relaxation and the crystal quality of InP top layer. It was suggested that when the total thickness of the epilayer was fixed, both the thickness and the periods and the distance from the interface should be carefully designed to reduce the stress and improve the crystal quality of the epilayer simultaneously. Finally, a 2-μm-thick InP epilayer was grown on GaAs substrate using (450°C, 15nm)/LT-InP(450°C, 15nm) double LT buffers combined with inserting 15-period (4nm/6nm) In0.8Ga0.2P/InP SLS into epilayer. Then X-ray diffraction measurements showed the best result of the full width at half maximum (FWHM) was 203 arcsec with estimated dislocation density of 2.8×107 cm-2.
The design and fabrication of a Monothically integrated dual-wavelength tunable photodetector are reported.
The dual-wavelength character is realized by introducing a taper substrate. The photodetector operating on
long wavelength is Monothically integrated by using heteroepitaxy growth of InP-In0.53Ga0.47As-InP p-i-n
structure on GaAs based GaAs/AlAs Fabry-Perot filter structure, which can be tuned by thermal-optic effect.
High quality heteroepitaxy was realized by employing a thin low-temperature buffer layer. The integrated
device with a dual-peak distance of 7nm (1530nm,1537nm) , a wavelength tuning range of 5.0 nm, and a
3-dB bandwidth of 5.9 GHz was demonstrated, according with the theoretical simulation.
Abstract: We have explored the shared-layer integration fabrication of an resonant-cavity-enhanced
p-i-n photodector (RCE- p-i-n-PD) and a single heterojunction bipolar transistor (SHBT) with the
same epitaxy grown layer structure. MOCVD growth of the different layer structure for the GaAs
based RCE- p-i-n-PD/SHBT require compromises to obtain the best performance of the integrated
devices. The SHBT is proposed with super-lattice in the collector, and the structure of the base
and the collector of the SHBT is used for the RCE. Up to now, the DC characteristics of the
integrated device have been obtained.
In order to resolve the trade-off between quantum efficiency and response speed in resonant cavity enhanced (RCE) photodiode, the scheme of the transparent and unique pattern ohmic contact (TUPOC) microstructure was proposed. This scheme can be used for improving device's response speed by reducing the diode capacitance without influencing quantum efficiency. Three kinds of the TUPOC microstructures were proposed and simulated, the first one was realized. The response speed of the finished device with mesa area of 50×50μm2 is remarkably increased, 3dB bandwidth of 18GHz has been demonstrated, but the device without the TUPOC microstructure only have 3dB bandwidth of 9.47GHz.
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