Mr. Jin-Young Choi Profile

Jin-Young Choi

at SK Hynix Inc

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Publications (6)

Proceedings Article | 20 March 2012 Paper

Characteristics analysis of RELACS process from an OPC point of view

Jinyoung Choi, Minae Yoo, Chanha Park, Changil Oh, Cheolkyun Kim, Hyunjo Yang, Donggyu Yim

Proceedings Volume 8325, 83251Z (2012) https://doi.org/10.1117/12.916121

KEYWORDS: Optical proximity correction, Image processing, Lithography, Semiconducting wafers, Photoresist processing, Standards development, Reticles, Resolution enhancement technologies, Scanning electron microscopy, Lithographic illumination

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There are strong demands for techniques which are able to extend application of ArF immersion lithography. Especially, the leading edge techniques are required to make very small hole patterns below 50nm. Several techniques such as double patterning technique, free-form illumination and resist shrinkage technology are considered as viable candidates. Most of all, NTD (Negative Tone Development) is being regarded as the most promising technology for the realization of small hole patterns When NTD process is applied, hole patterns are defined by island type features on the reticle and consequently its optical performance shows better result compared with PTD (Positive Tone Development) process. However it is still difficult to define extremely small hole patterns below 40nm, new combination process of NTD with RELACS is being introduced to overcome resolution limitation. NTD combined with RELACS, which is the most advanced lithography technology, definitely enable us to generate smaller size hole patterns on the wafer. A chemical shrinkage technology, RELACS (Resolution Enhancement Lithography Assisted by Chemical Shrink), utilizes the cross linking reaction catalyzed by the acid component existing in a predefined resist pattern. In case of PTD combined with RELACS process, we already know that CD change after the shrinkage process is not influenced by duty ratio. So we could easily reflect the RELACS bias to meet the CD target during OPC (Optical Proximity Correction) procedure. But NTD combined with RELACS process was not understood clearly, nor verified. It requires more investigation of physical behavior during combined process in order to define exact hole patterns. The newly introduced process might require additive OPC modeling procedure to satisfy target CD when NTD RELACS bias has different values according to pitch and shape. This study is going to include the investigation on two types of resist shrinkage process, PTD and NTD. The optimized OPC methodology will be discussed through the evaluation on simple array hole patterns and random hole patterns.

Proceedings Article | 4 March 2010 Paper

Analysis of the impact of pupil shape variation by pupil fit modeling

Jin-hyuck Jeon, Chan-ha Park, Hyun-jo Yang, Cheol-kyun Kim, Jin-young Choi, Sang-jin Oh, Dong-gyu Yim, Sung-ki Park, Ki-yeop Park, Young-hong Min, Andre Engelen, Bart Smeets, Joerg Zimmermann

Proceedings Volume 7640, 76400Y (2010) https://doi.org/10.1117/12.846703

KEYWORDS: Scanners, Critical dimension metrology, Shape analysis, Optical proximity correction, Fiber optic illuminators, Semiconducting wafers, Lithography, Control systems, Instrument modeling, Process control

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As K1 factor for mass-production of memory devices has been decreased to almost its theoretical limit, the process window of lithography is getting much smaller and the production yield has become more sensitive to even small variations of the process in lithography. So it is necessary to control the process variations more tightly than ever. In mass-production, it is very hard to extend the production capacity if the tool-to-tool variation of scanners and/or scanner stability through time is not minimized. One of the most critical sources of variation is the illumination pupil. So it is critical to qualify the shape of pupils in scanners to control tool-to-tool variations. Traditionally, the pupil shape has been analyzed by using classical pupil parameters to define pupil shape, but these basic parameters, sometimes, cannot distinguish the tool-to-tool variations. It has been found that the pupil shape can be changed by illumination misalignment or damages in optics and theses changes can have a great effect on critical dimension (CD), pattern profile or OPC accuracy. These imaging effects are not captured by the basic pupil parameters. The correlation between CD and pupil parameters will become even more difficult with the introduction of more complex (freeform) illumination pupils. In this paper, illumination pupils were analyzed using a more sophisticated parametric pupil description (Pupil Fit Model, PFM). And the impact of pupil shape variations on CD for critical features is investigated. The tool-to-tool mismatching in gate layer of 4X memory device was demonstrated for an example. Also, we interpreted which parameter is most sensitive to CD for different applications. It was found that the more sophisticated parametric pupil description is much better compared to the traditional way of pupil control. However, our examples also show that the tool-to-tool pupil variation and pupil variation through time of a scanner can not be adequately monitored by pupil parameters only, The best pupil control strategy is a combination of pupil parameters and simulated CD using measured illumination pupils or modeled pupils.

Proceedings Article | 16 March 2009 Paper

Novel OPC method to create sub 45nm contact hole using design based metrology

Dong-Jin Lee, Se-young Oh, Jong-cheon Park, Jin-young Choi, Jungchan Kim, Cheolkyun Kim, Donggyu Yim

Proceedings Volume 7274, 72742C (2009) https://doi.org/10.1117/12.814386

KEYWORDS: Optical proximity correction, Critical dimension metrology, Metrology, Printing, Overlay metrology, Data modeling, Photomasks, Semiconductors, Systems modeling

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Proceedings Article | 4 December 2008 Paper

Novel process proximity correction by the pattern-to-pattern matching method with DBM

Dae-Jin Park, Jinyoung Choi, Hyoungsoon Yune, Jaeseung Choi, Cheolkyun Kim, Bong-Ryoul Choi, Donggyu Yim

Proceedings Volume 7140, 71403K (2008) https://doi.org/10.1117/12.804660

KEYWORDS: Critical dimension metrology, Optical proximity correction, Transistors, Semiconducting wafers, Etching, Error analysis, Data modeling, Thermal effects, Databases, Metrology

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Proceedings Article | 4 December 2008 Paper

Resolution enhancement techniques for contact hole printing of sub-50nm memory device

Hye-Jin Shin, Tae-jun You, Min-Ae Yoo, Jin-Young Choi, Kiho Yang, Chan-Ha Park, Dong-gyu Yim

Proceedings Volume 7140, 714034 (2008) https://doi.org/10.1117/12.804646

KEYWORDS: SRAF, Diffractive optical elements, Resolution enhancement technologies, Photoresist processing, Lithography, Printing, Source mask optimization, Fiber optic illuminators, Semiconducting wafers, Optical lithography

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Proceedings Article | 7 March 2008 Paper

The analysis of optical lithography at 2-dimensional dense structure

Chanha Park, Tae-Seung Eom, Hyejin Shin, Kiho Yang, Jinyoung Choi, Jinsoo Kim, Hyeongsoo Kim, Donggyu Yim, Jinwoong Kim

Proceedings Volume 6924, 69244V (2008) https://doi.org/10.1117/12.772446

KEYWORDS: Transistors, Optical lithography, Photomasks, Lithography, Printing, 3D image processing, Binary data, Critical dimension metrology, Etching, Photoresist processing

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Showing 5 of 6 publications

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