Quantum systems are entering a crucial stage of technology development where it is critical that design automation tools are co-developed along with the technology itself. Electronics design ecosystem provides tools which may be extended towards simulation and verification, critical steps towards large-scale certifiable designs of such quantum systems. SPICE simulations provide an appropriate level of abstraction that is both physical, in terms of custom designed physical components, and simulation approach, i.e. differential-algebraic equations. In this work we describe our efforts in modeling quantum + classical systems within SPICE. We first present our highly successful spintronics platform that has allowed us to model a multitude of spintronic effects including transport in tunnel-junctions, full lifecycle of quasi-quantum topological objects such as skyrmions, and transport in topological materials (TI, Weyl Semimetals). We demonstrate the extension of this platform towards simulations of circuits built using spin-qubits made from Josephson junctions, and a more emergent platform of Majorana Zero Modes (MZMs). We describe our approach that allows us to abstract away microscopic details, while capturing device and circuit behavior using controlled sources and custom components. We describe our approach to embed full dynamic solutions of alternate non-electrical state variables and indeed abstract quantities within the framework of SPICE. Our approach interplays well with more “fundamental” modeling approaches such as quantum master equations and non-equilibrium Green’s functions, as well as more “system” level modeling approaches such as SystemVerilog, thereby bridging both these worlds for exploration, analysis, simulation, and verification of scaled quantum systems.
The end of Moore’s Law and the rise of “smart” consumer electronics has wide opened the gate for creative hardware design for the next few decades. While linear algebra accelerators and emulated hardware on FPGA has made some advances in this direction, a fundamentally different approach is required for reaching the efficiency and performance that will be necessary to embed cognitive computing in-situ in these next generation devices. To address this problem, in this work, we present a collection of spintronic hardware building blocks, fabricable with present day technology, that can be used to build biologically inspired neuromorphic hardware. These hardware units provide neuromorphic behavior derived from their physics and manifested in their electrical characteristics, therefore opening the pathway for compact, low power and VLSI grade scalability using these units. The collection contains two types of stochastic neuron (SN) devices: Analog (ASN) and Binary (BSN) as well as multi-level programmable synaptic connections that can be used for implementing compact dendrites. We discuss the area and power savings brought on by these building blocks and compared with an example design using FPGAs. This functionally complete but minimal set of neuromorphic building blocks can be used to implement a variety of neuromorphic architectures, as demonstrated in this work. We end the discussion with design ideas for neuromorphic architectures, which do not merely implement fast linear algebra but go beyond to elevate compact, physics-based field programmable neuromorphic arrays as first class citizens in every designers toolkit.
Conventional transistor and magnet-based memory devices make use of deterministic bits that are either a "0" or a "1". In a series of recent papers, we proposed a probabilistic framework that makes use of unstable devices with low barriers to represent probabilistic bits (p-bit). In this paper, we review some of this earlier work and suggest possible future directions.
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