Mask effect will be more sensitive for wafer printing in high-end technology. For advance only using current wafer
model can not predict real wafer behavior accurately because it do not concern real mask performance (CD error, corner
rounding..).
Generally, we use wafer model to check whether our OPC results can satisfy our requirements (CD target). Through
simulation on post-OPC patterns by using wafer model, we can check whether these post-OPC patterns can meet our
target. Hence, accuracy model can help us to predict real wafer printing results and avoid OPC verification error.
To Improve simulation verification accuracy at wafer level and decrease false alarm. We must consider mask effect
like corner rounding and line-end shortening...etc in high-end mask. UMC (United Microelectronics Corporation) has
cooperated with Brion and DNP to evaluate whether the wafer LMC (Lithography Manufacturability Check) (Brion hot
spots prediction by simulation contour) accuracy can be improved by adding mask model into LMC verification
procedure. We combine mask model (DNP provide 45nm node Poly mask model) and wafer model (UMC provide 45nm
node Poly wafer model) then build up a new model that called M-FEM (Mask Focus Energy Matrix model) (Brion
fitting M-FEM model). We compare the hotspots prediction between M-FEM model and baseline wafer model by LMC
verification. Some different hotspots between two models were found. We evaluate whether the hotspots of M-FEM is
more close to wafer printing results.
In the ever-changing semiconductor industry, wafer fabs and mask shops alike are adding low
cost of ownership (CoO) to the list of requirements for inspections tools. KLA-Tencor has
developed and introduced STARlight2+ (SL2+) to satisfy this need. This new software
algorithm is available on all TeraScanHR and TeraFab models. KLA-Tencor has cooperated
with United Microelectronics Corporation (UMC) to demonstrate and improve SL2+, including
its ability to lower CoO, on 65nm and below photomasks.
These improvements are built on the rich history of STARlight. Over the years, STARlight has
become one of the industry standards for reticle inspection. Like its predecessors, SL2+ uses
only transmitted and reflected light images from a reticle to identify defects on the reticle. These
images along with plate-specific information are then processed by SL2+ to generate reference
images of how the patterns on the reticle should appear. These reference images are then
compared with the initial optical images to identify the defects.
The new and improved SL2+ generates more accurate reference images. These images reduce
background noise and increase the usable sensitivity. With the results from controlled
engineering tests, a fab or mask shop can then decide to inspect reticles at a given technology
node with a large pixel; this is sometimes referred to as pixel migration. The larger pixel with
SL2+ can then perform the inspections at similar sensitivity settings and higher throughput, thus
lowering CoO.
As semiconductor process technology moves down below 90nm and 65nm, more and more wafer fabs are starting to apply 193nm CPL (Chromeless Phase Lithography) technology as the main lithography strategy for their most critical layers. However the 3D pattern profile is another critical factor, which affects image intensity and final process window. Since 193nm CPL is a relatively new technology in the semiconductor industry, it is important for us to understand the key mask specifications of 193nm CPL and their impact on wafer-level imaging. In this paper, we will study the effects of sidewall angle on process window and wafer CD using 193nm CPL masks in a 300mm wafer manufacturing environment. We begin our experiment by making several special 193nm CPL masks. These masks have been specially designed with different sidewall angles (SWA) with phase of 180 degrees. The sidewall angle spread represents approximately 10 degrees. We use specially designed test patterns that are compatible at the 65nm technology node. In our experiment, we first study the correlation between AFM (atomic force microscope)-determined profile angle and lithographic process behavior. In addition, simulation was also used to predict the impact of 3D profile on process performance.
All lithographic experiments were performed on 300mm wafers using a high NA ASML 193nm scanner and high contrast resist. In this study, we have focused on the impact of sidewall angle on wafer process performance by comparing the wafer CD and pattern profile through focus. In order to establish more effective specifications of angle control in 193nm CPL between mask shop and wafer fabs, all AFM, wafer CD, and simulation results will be compared and correlated.
For sub-0.13um lithography, attenuated phase shifting mask (AttPSM) with optical proximity correction (OPC) is reported as one of the potential methods to achieve manufacturable process by using 248nm exposure wavelength. Unfortunately, the low-k1 imaging process in 130nm lithography imposes much more stringent requirements on defect repair, especially on AttPSM reticle. Therefore, the imperfect repairs will have a significant impact on wafer process window due to quartz damage and phase distortion caused by Ga+ ion stain removal and added carbon material, respectively.
In this paper, we have prepared AttPSM test masks having programmed defects with various opaque defects. Each defect area was inspected with KLA-Tencor's SLF27 inspection system to acquire defect coordinates and image, simulated with AIMS to assess the intensity and transmission loss induced by repair process. All of masks were made by DuPont Photomasks Taiwan (DPT) by using the Jbx9000MV2 E-beam writer and dry Chrome etch process. All lithographic experiments were performed on 300mm wafer using high NA ASML AT750S scanner and high contrast CAR resist. In this study, we have focused on the impact of quartz damage and phase error on wafer process window by comparing the wafer CD and pattern profile through focus. In order to establish a efficient way to perform effective judgement on repair defect between mask shop and wafer fab, both AIMS and wafer results will be compared and correlated.
In this study, 2PSM and 3PSM are implemented to print low- duty-ratio self-aligned contact plugs. The simulation and experimental results demonstrate that 2PSM has larger process windows than 3PSM. One of the advantages of 2PSM is no asymmetric defocus effect, which is caused by the phase difference of 3PSM and reduces the process window of 3PSM. Defocus-dependent shape distortion in the case of 3PSM is not found in the case of 2PSM, either. Different illumination conditions have been investigated to determine the best illumination condition for 2PSM in terms of large common process window besides less x-y distortion. Optimum illumination parameters and suitable scattering bars can minimize pattern distortion.
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