Dr. Ronald A. Della Guardia Profile

Dr. Ronald A. Della Guardia

Engineer at IBM Thomas J Watson Research Ctr

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Author

Publications (11)

Proceedings Article | 30 March 2010 Paper

Fabrication of dual damascene BEOL structures using a multilevel multiple exposure (MLME) scheme, part 2: RIE-based pattern transfer and completion of dual damascene process yielding an electrically functional via chain

Stefan Harrer, John Arnold, Dario Goldfarb, Steven Holmes, Rex Chen, Cherry Tang, Mark Slezak, Nicolette Fender, Ronald Della Guardia, Eric Joseph, Sebastian Engelmann, Shyng-Tsong Chen, Dave Horak, Yunpeng Yin, Rao Varanasi, Matthew Colburn

Proceedings Volume 7639, 763919 (2010) https://doi.org/10.1117/12.846593

KEYWORDS: Back end of line, Dielectrics, Etching, Lithography, Reactive ion etching, Photoresist materials, Optical lithography, Semiconducting wafers, Copper, Polishing

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A novel back-end-of-line (BEOL) patterning and integration process termed Multi-Level Multiple Exposure (MLME) technique is herein introduced. The MLME technique simplifies BEOL dual damascene (DD) integration while simultaneously being applicable to all BEOL levels. It offers a patterning resolution reaching into the sub-100nm region and improves semiconductor manufacturing cost and throughput. MLME employs a dual-layer imaging stack (via + trench resists) cast onto a customized etch transfer multilayer stack. This process implements a strict litho-litho-etch sequence for transferring the trench- and via-patterns into the dielectric layer. Under the MLME scheme, two imaging steps (i.e. via- and trench-level patterning) are executed consecutively followed by a dry etch process that transfers the lithographically-formed patterns into the customized etch transfer multilayer stack and further into the dielectric layer. The MLME integration scheme not only decreases the number of overall process steps for the full DD BEOL process but also eliminates several inter-tool wafer exchange sequences as performed in a conventional litho-etch-litho-etch process flow. All MLME process steps were demonstrated i.e. combined 193nm-dry dual-resist layer MLME via- and trench-lithography, full pattern transfer of via- and trench-patterns into the dielectric layer using reactive ion etching (RIE), as well as electroplating and polishing of the DD patterns. This paper provides a detailed description of both post-lithography steps of the DD process for a DD BEOL structure, i.e. (i) the RIE-pattern transfer process with the customized multilayer stack, and (ii) the metallization process completing the DD process for one BEOL layer. Furthermore, the integration capabilities of the MLME technique were demonstrated and characterized by generating an electrically functional via-chain connecting two neighboring BEOL layers fabricated by subsequently applying the MLME approach to both layers. An exhaustive description and evaluation of MLME lithographic patterning is given in an accompanying paper.

Proceedings Article | 26 March 2010 Paper

Fabrication of dual damascene BEOL structures using a multilevel multiple exposure (MLME) scheme, part 1: lithographic patterning

Dario Goldfarb, Stefan Harrer, John Arnold, Steven Holmes, Rex Chen, Cherry Tang, Nicolette Fender, Mark Slezak, Ronald Della Guardia, Eric Joseph, Sebastian Engelmann, Roa Varanasi, Matthew Colburn

Proceedings Volume 7639, 76390I (2010) https://doi.org/10.1117/12.846443

KEYWORDS: Optical lithography, Einsteinium, Back end of line, Etching, Dielectrics, Semiconducting wafers, Lithography, Photoresist materials, Nanoimprint lithography, Reactive ion etching

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Proceedings Article | 28 May 2004 Paper

BEOL lithography for early development at the 65-nm node

Ronald DellaGuardia, Ranee Kwong, Wenjie Li, Peggy Lawson, Martin Burkhardt, Ioana Grauer, Qiang Wu, M. Angyal, H. Hichri, Ian Melville, K. Kumar, Y. Lin, Steven Holmes, R. Varanasi, T. Spooner, D. McHerron

Proceedings Volume 5377, (2004) https://doi.org/10.1117/12.544238

KEYWORDS: Lithography, Etching, Photomasks, Semiconducting wafers, Metals, Critical dimension metrology, Silicon, Image processing, Back end of line, Finite element methods

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Proceedings Article | 30 July 2002 Paper

193-nm lithography and resist reflow for the BEOL

Ronald DellaGuardia

Proceedings Volume 4691, (2002) https://doi.org/10.1117/12.474635

KEYWORDS: Photomasks, Phase shifts, Lithography, Printing, Critical dimension metrology, Tolerancing, Photoresist processing, Semiconducting wafers, 193nm lithography, Photoresist materials

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Proceedings Article | 24 July 2002 Paper

Methods for comparing contact hole shrinking techniques with 248-nm single layer and bilayer photoresists

Karen Petrillo, John Simons, Ronald DellaGuardia

Proceedings Volume 4690, (2002) https://doi.org/10.1117/12.474275

KEYWORDS: Semiconducting wafers, Photoresist processing, Line edge roughness, Photoresist materials, Critical dimension metrology, Lithography, Manufacturing, Image processing, Statistical analysis, Photoresist developing

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Proceedings Article | 14 September 2001 Paper

193 lithography and RELACS processing for BEOL lithography

Ronald DellaGuardia, Karen Petrillo, Jia Chen, Paul Rabidoux, Timothy Dalton, Steven Holmes, Linda Hadel, K. Malone, Arpan Mahorowala, S. Greco, Richard Ferguson

Proceedings Volume 4346, (2001) https://doi.org/10.1117/12.435636

KEYWORDS: Photomasks, Lithography, Semiconducting wafers, Printing, Etching, Photoresist processing, Optical proximity correction, 193nm lithography, Photoresist materials, Resistance

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Proceedings Article | 5 July 2000 Paper

Image shortening and process development in BEOL lithography

Ronald DellaGuardia, Dennis Warner, Zheng Chen, Martin Stetter, Richard Ferguson, Anne McGuire, Karen Badger

Proceedings Volume 4000, (2000) https://doi.org/10.1117/12.388928

KEYWORDS: Image processing, Lithography, Photomasks, Printing, Phase shifts, Critical dimension metrology, Back end of line, Lithographic illumination, Distance measurement, Semiconductors

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Proceedings Article | 11 June 1999 Paper

Correlations between dissolution data and lithography of various resists

Ronald DellaGuardia, Wu-Song Huang, K. Rex Chen, Doris Kang

Proceedings Volume 3678, (1999) https://doi.org/10.1117/12.350215

KEYWORDS: Polymers, Lithography, Data modeling, Absorbance, Deep ultraviolet, Modeling, Photography, Systems modeling, Photoresist materials, Semiconductors

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Proceedings Article | 7 July 1997 Paper

New ESCAP-type resist with enhanced etch resistance and its application to future DRAM and logic devices

Will Conley, William Brunsvold, Fred Buehrer, Ronald DellaGuardia, David Dobuzinsky, Timothy Farrell, Hok Ho, Ahmad Katnani, Robin Keller, James Marsh, Paul Muller, Ronald Nunes, Hung Ng, James Oberschmidt, Michael Pike, Deborah Ryan, Tina Cotler-Wagner, Ron Schulz, Hiroshi Ito, Donald Hofer, Gregory Breyta, Debra Fenzel-Alexander, Gregory Wallraff, Juliann Opitz, James Thackeray, George Barclay, James Cameron, Tracy Lindsay, Michael Cronin, Matthew Moynihan, Sassan Nour, Jacque Georger, Mike Mori, Peter Hagerty, Roger Sinta, Thomas Zydowsky

Proceedings Volume 3049, (1997) https://doi.org/10.1117/12.275830

KEYWORDS: Semiconducting wafers, Photoresist materials, Etching, Polymers, Resistance, Lithography, Silicon, Glasses, Annealing, Photoresist processing

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Proceedings Article | 27 May 1996 Paper

X-ray exposure in the manufacture of sub-150-nm gate lines

Angela Lamberti, Paul Agnello, Emmanuel Crabbe, Ronald DellaGuardia, James Oberschmidt, Seshu Subbana, Steve Wu

Proceedings Volume 2723, (1996) https://doi.org/10.1117/12.240475

KEYWORDS: Photomasks, Semiconducting wafers, X-rays, Optical alignment, X-ray lithography, X-ray optics, Lithography, Photoresist materials, Real-time computing, Picosecond phenomena

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Proceedings Article | 19 May 1995 Paper

Fabrication of 64-Mb DRAM using x-ray lithography

Ronald DellaGuardia, Chet Wasik, Denise Puisto, Robert Fair, Lars Liebmann, Janet Rocque, Steven Nash, Angela Lamberti, George Collini, R. French, Ben Vampatella, George Gifford, V. Nastasi, Phil Sa, F. Volkringer, Thomas Zell, David Seeger, John Warlaumont

Proceedings Volume 2437, (1995) https://doi.org/10.1117/12.209190

KEYWORDS: Photomasks, Semiconducting wafers, X-rays, Etching, X-ray lithography, Overlay metrology, X-ray optics, Scanning electron microscopy, Wafer-level optics, Error analysis

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Showing 5 of 11 publications

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