Mr. Sarohan Park Profile

Sarohan Park

Team Leader at SK Hynix Inc

SPIE Involvement:

Author

Publications (17)

Proceedings Article | 26 March 2019 Presentation + Paper

Presentation + Paper

Staggered pillar patterning using 0.33NA EUV lithography

Danilo De Simone, Romuald Blanc, Jeroen Van de Kerkhove, Amir-Hossein Tamaddon, Roberto Fallica, Lieve Van Look, Nouredine Rassoul, Frederic Lazzarino, Nadia Vandenbroeck, Pieter Vanelderen, Gian Lorusso, Frieda Van Roey, Anne-Laure Charley, Geert Vandenberghe, Kurt Ronse, Kilyoung Lee, Junghyung Lee, Sarohan Park, Chang-Moon Lim, Chan-Ha Park

Proceedings Volume 10957, 109570T (2019) https://doi.org/10.1117/12.2515170

KEYWORDS: Optical lithography, Extreme ultraviolet lithography, Semiconducting wafers, Etching, Extreme ultraviolet, Critical dimension metrology, Image processing, Failure analysis, Scanning electron microscopy, Image analysis

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Proceedings Article | 5 May 2017 Paper

Paper

Study on restricting factors of practical k1 limit in 0.33NA EUV lithography

Sunyoung Koo, Mijung Lim, Inhwan Lee, Sarohan Park, Jinwoo Choi, Yoonsuk Hyun, Chang-Moon Lim

Proceedings Volume 10143, 101431B (2017) https://doi.org/10.1117/12.2258144

KEYWORDS: Nanoimprint lithography, Photomasks, Stochastic processes, Diffraction, Extreme ultraviolet lithography, Optical lithography, Lithographic illumination, Scanners, Immersion lithography, Stray light, Extreme ultraviolet, Calibration, Fiber optic illuminators, Contamination

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Proceedings Article | 18 March 2016 Paper

Paper

Extension of practical k1 limit in EUV lithography

Sarohan Park, Inwhan Lee, Sunyoung Koo, Junghyung Lee, Chang-Moon Lim

Proceedings Volume 9776, 97761Q (2016) https://doi.org/10.1117/12.2219546

KEYWORDS: Extreme ultraviolet lithography, Extreme ultraviolet, Optical lithography, Nanoimprint lithography, Lithographic illumination, Source mask optimization, Resolution enhancement technologies, Line width roughness, Stochastic processes, Scanners, Photomasks, Semiconducting wafers, Lithography, Critical dimension metrology

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Proceedings Article | 18 March 2016 Paper

Paper

Improvement of EUV mix-match overlay for production implementation

Sarohan Park, ByoungHoon Lee, Byong-Seog Lee, Inwhan Lee, Chang-Moon Lim

Proceedings Volume 9776, 97760E (2016) https://doi.org/10.1117/12.2219169

KEYWORDS: Extreme ultraviolet, Extreme ultraviolet lithography, Semiconducting wafers, Optical lithography, Error analysis, Double patterning technology, EUV optics, Overlay metrology, Scanners, Particles, Optical parametric oscillators, Lithography

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Proceedings Article | 16 March 2015 Paper

Paper

EUV contact holes and pillars patterning

Sarohan Park, Danilo De Simone , Zheng Tao, Geert Vandenberghe, Yoonsuk Hyun, Seo-Min Kim, Chang-Moon Lim

Proceedings Volume 9422, 94220S (2015) https://doi.org/10.1117/12.2085920

KEYWORDS: Optical lithography, Photomasks, Photoresist processing, Extreme ultraviolet, Extreme ultraviolet lithography, Nanoimprint lithography, Electroluminescence, Image processing, Stochastic processes, Scanners

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Proceedings Article | 20 April 2011 Paper

Paper

Diffraction-based overlay for spacer patterning and double patterning technology

Byoung Hoon Lee, JeongSu Park, Jongsu Lee, Sarohan Park, ChangMoon Lim, Dong-Gyu Yim, Sungki Park, Chan-Ho Ryu, Stephen Morgan, Maurits van de Schaar, Andreas Fuchs, Kaustuve Bhattacharyya

Proceedings Volume 7971, 79712U (2011) https://doi.org/10.1117/12.870473

KEYWORDS: Overlay metrology, Diffraction gratings, Double patterning technology, Diffraction, Optical lithography, Metrology, Resolution enhancement technologies, Semiconducting wafers, Lithography, Scanning electron microscopy

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Proceedings Article | 2 April 2010 Paper

Paper

Improvement of the process overlay control for sub-40-nm DRAM

Sarohan Park, Eun-Ha Lee, Eun-Kyoung Shin, Yoon-Jung Ryu, Hye-Jin Shin, Seung-Hyun Hwang, Hee-Youl Lim, Kyu-Tae Sun, Tae-Seung Eom, Noh-Jung Kwak, Sung-Ki Park

Proceedings Volume 7638, 76382H (2010) https://doi.org/10.1117/12.846489

KEYWORDS: Semiconducting wafers, Overlay metrology, Chemical mechanical planarization, Process control, Distortion, Photomasks, Optical alignment, Optical lithography, Data modeling, Control systems

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Proceedings Article | 4 March 2010 Paper

Paper

Applications of MoSi-based binary intensity mask for sub-40nm DRAM

Tae-Seung Eom, Eun-Kyoung Shin, Eun-Ha Lee, Yoon-Jung Ryu, Jun-Taek Park, Sunyoung Koo, Hye-Jin Shin, Seung-Hyun Hwang, Hee-Youl Lim, Sarohan Park, Kyu-Tae Sun, Noh-Jung Kwak, Sung-Ki Park

Proceedings Volume 7640, 76402J (2010) https://doi.org/10.1117/12.846728

KEYWORDS: Photomasks, Binary data, Transmittance, Diffraction, Chromium, Polarization, Lithography, Scanners, Nanoimprint lithography, Optical lithography

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In this paper, we will present applications of MoSi-based binary intensity mask for sub-40nm DRAM with hyper-NA immersion scanner which has been the main stream of DRAM lithography. Some technical issues will be reported for polarized illumination and mask materials in hyper-NA imaging. One att.PSM (Phase Shift Mask) and three types of binary intensity mask are used for this experiment; those are ArF att.PSM ( MoSi:760Å , transmittance 6% ), conventional Cr ( 1030Å ) BIM (Binary Intensity Mask), MoSi-based BIM ( MoSi:590Å , transmittance 0.1%) and multi layer ( Cr:740Å / MoSi:930Å ) BIM. Simulation and experiment with 1.35NA immersion scanner are performed to study influence of mask structure, process margin and effect of polarization. Two types of DRAM cell patterns are studied; one is a line and space pattern and the other is a contact hole pattern through mask structure. Various line and space pattern is also through 38nm to 50nm half pitch studied for this experiment. Lithography simulation is done by in-house tool based on diffused aerial image model. EM-SUITE is also used in order to study the influence of mask structure and polarization effect through rigorous EMF simulation. Transmission and polarization effects of zero and the first diffraction orders are simulated for both att.PSM and BIM. First and zero diffraction order polarization are shown to be influenced by the structure of masking film. As pattern size on mask decreases to the level of exposure wavelength, incident light will interact with mask pattern, thereby transmittance changes for mask structure. Optimum mask bias is one of the important factors for lithographic performance. In the case of att.PSM, negative bias shows higher image contrast than positive one, but in the case of binary intensity mask, positive bias shows better performance than negative one. This is caused by balance of amplitude between first diffraction order and zero diffraction order light.1 Process windows and mask error enhancement factors are measured with respect to several types of mask structure. In the case of one dimensional line and space pattern, MoSi-based BIM and conventional Cr BIM show the best performance through various pitches. But in the case of hole DRAM cell pattern, it is difficult to find out the advantage of BIM except of exposure energy difference. Finally, it was observed that MoSi-based binary intensity mask for sub- 40nm DRAM has advantage for one dimensional line and space pattern.

Proceedings Article | 18 March 2009 Paper

Paper

Comparative study of DRAM cell patterning between ArF immersion and EUV lithography

Tae-Seung Eom, Sarohan Park, Jun-Taek Park, Chang-Moon Lim, Sunyoung Koo, Yoon-Suk Hyun, HyeongSoo Kim, Byung-Ho Nam, Chang-Reol Kim, Seung-Chan Moon, Noh-Jung Kwak, Sungki Park

Proceedings Volume 7271, 727115 (2009) https://doi.org/10.1117/12.814378

KEYWORDS: Photomasks, Extreme ultraviolet lithography, Extreme ultraviolet, Optical lithography, Double patterning technology, Lithography, Etching, Critical dimension metrology, Scanners, Immersion lithography

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In this paper, we will present comparison of DRAM cell patterning between ArF immersion and EUV lithography which will be the main stream of DRAM lithography. Assuming that the limit of ArF immersion single patterning is around 40nm half pitch, EUV technology is positioned on essential stage because development stage of device manufacturer is going down sub-40nm technology node. Currently lithography technology, in order to improve the limitation of ArF immersion lithography, double patterning technology (DPT) and spacer patterning technology (SPT) have been examined intensively. However, double patterning and spacer patterning technology are not cost-effective process because of complexity of lithography process such as many hard mask stacks and iterative litho, etch process. Therefore, lithography community is looking forward to improving maturity of EUVL technology. In order to overcome several issues on EUV technology, many studies are needed for device application. EUV technology is different characteristics with conventional optical lithography which are non-telecentricity and mask topography effect on printing performance. The printed feature of EUV is shifted and biased on the wafer because of oblique illumination of the mask. Consequently, target CD and pattern position are changed in accordance with pattern direction, pattern type and slit position of target pattern.1 For this study, we make sub-40nm DRAM mask for ArF immersion and EUV lithography. ArF attenuated PSM (Phase Shift Mask) and EUV mask (LTEM) are used for this experiment; those are made and developed by in-house captive maskshop. Simulation and experiment with 1.35NA ArF immersion scanner and 0.25NA EUV full field scanner are performed to characterize EUV lithography and to compare process margin of each DRAM cell. Two types of DRAM cell patterns are studied; one is an isolation pattern with a brick wall shape and another is a storage node pattern with contact hole shape. Line and space pattern is also studied through 24nm to 50nm half pitch for this experiment. Lithography simulation is done by in-house tool based on diffused aerial image model. EM-SUITE and Solid-EUV are also used in order to study characteristics of EUV patterning through rigorous EMF simulation. We also investigated shadowing effect according to pattern shape and design rule respectively. We find that vertical to horizontal bias is around 2nm on 32nm to 40nm half pitch line and space pattern. In the case of DRAM cell, we also find same result with line and space pattern. In view of mask-making consideration, we optimize absorber etch process. So we acquire vertical absorber profile and mask MTT(Mean To Target) within 10% of target CD through several pitch. Process windows and mask error enhancement factors are measured with respect to several DRAM cell pattern. In the case of one dimensional line and space and two dimensional brick wall pattern, vertical pattern shows the best performance through various pitches because of lower shadowing effect than horizontal pattern. But in case of contact hole DRAM cell pattern such as storage node pattern, it has bigger MEF value than one or two dimensional pattern because of independency of shadowing effect. Finally, we compare with 2x, 3x and 4x DRAM cell patterning performance in terms of pattern fidelity, slit CD uniformity and shadowing effect.

Proceedings Article | 18 March 2009 Paper

Paper

EUV-patterning characterization using a 3D mask simulation and field EUV scanner

Jun-Taek Park, Yoon-Suk Hyun, Chang-Moon Lim, Tae-Seung Eom, Sunyoung Koo, Sarohan Park, Suk-Kyun Kim, Keun-Do Ban, Hyun-Jo Yang, Chang-Il Oh, Byung-Ho Nam, Chang-Reol Kim, HyeongSoo Kim, Seung-Chan Moon, Sungki Park

Proceedings Volume 7271, 72711G (2009) https://doi.org/10.1117/12.814407

KEYWORDS: Photomasks, Extreme ultraviolet lithography, Scanners, Critical dimension metrology, Extreme ultraviolet, Silicon, Optical lithography, Deep ultraviolet, Semiconducting wafers, Laser scanners

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Proceedings Article | 4 December 2008 Paper

Paper

Alternative technology for double patterning process simplification

Hee-Youl Lim, Kyo-Young Jang, Jae-Heon Kim, Sung-Gu Lee, Sarohan Park, Tae-Hwan Kim, Cheol-Kyu Bok, Seung-Chan Moon

Proceedings Volume 7140, 714020 (2008) https://doi.org/10.1117/12.804657

KEYWORDS: Double patterning technology, Lithography, Photomasks, Etching, Photoresist materials, Optical lithography, Image processing, Coating, Scanning electron microscopy, Extreme ultraviolet

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Proceedings Article | 4 December 2008 Paper

Paper

Study on imaging characterization of ArF high index immersion lithography

Sarohan Park, Jun-Taek Park, Kilyoung Lee, Tae-Seung Eom, Jin-Soo Kim, Hyeong-Soo Kim, Seung-Chan Moon

Proceedings Volume 7140, 71401K (2008) https://doi.org/10.1117/12.804651

KEYWORDS: Photomasks, Optical lithography, Reflectivity, Immersion lithography, Lithography, Image processing, Image enhancement, Polarization, Semiconducting wafers, Transmittance

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Proceedings Article | 7 March 2008 Paper

Paper

Comparative study of binary intensity mask and attenuated phase shift mask using hyper-NA immersion lithography for sub-45nm era

Tae-Seung Eom, Jun-Taek Park, Jung-Hyun Kang, Sarohan Park, Sunyoung Koo, Jin-Soo Kim, Byoung-Hoon Lee, Chang-Moon Lim, HyeongSoo Kim, Seung-Chan Moon

Proceedings Volume 6924, 69240H (2008) https://doi.org/10.1117/12.772246

KEYWORDS: Photomasks, Chromium, Binary data, Polarization, Pellicles, Diffraction, Scanners, Phase shifts, Lithography, Immersion lithography

Read Abstract +

In this paper, we will present comparison of attenuated phase shift mask and binary intensity mask at hyper-NA immersion scanner which has been the main stream of DRAM lithography. Some technical issues will be reported for polarized illumination in hyper-NA imaging. One att.PSM (Phase Shift Mask) and three types of binary intensity mask are used for this experiment; those are ArF att.PSM ( MoSi:Å ), thick Cr ( 1030Å ) BIM (Binary Intensity Mask), thin Cr ( 590Å ) BIM and multi layer ( Cr:740Å / MoSi:930Å ) BIM. Simulation and experiment with 1.35NA immersion scanner are performed to study influence of mask structure, process margin and effect of polarization. Two types of DRAM cell patterns are studied; one is an isolation pattern with a brick wall shape and another is a storage node pattern with contact hole shape. Line and space pattern is also studied through 38nm to 50nm half pitch for this experiment. Lithography simulation is done by in-house tool based on diffused aerial image model. EM-SUITE is also used in order to study the influence of mask structure and polarization effect through rigorous EMF simulation. Transmission and polarization effects of zero and first diffraction order are simulated for both att.PSM and BIM. First and zero diffraction order polarization are shown to be influenced by the structure of masking film. As pattern size on mask decreases to the level of exposure wavelength, incident light will interact with mask pattern, and then transmittance changes for mask structure. Optimum mask bias is one of the important factors for lithographic performance. In the case of att.PSM, negative bias shows higher image contrast than positive one, but in case of binary intensity mask, positive bias shows better performance than negative one. This is caused by balance of amplitude between first diffraction order and zero diffraction order light. Process windows and mask error enhancement factors are measured with respect to various design rules, i.e., different k1 levels at fixed NA. In the case of one dimensional line and space pattern, thick Cr BIM shows the best performance through various pitches. But in case of two dimensional DRAM cell pattern, it is difficult to find out the advantage of BIM for sub-45nm. It needs further study for two dimensional patterns. Finally, it was observed that thick Cr binary intensity mask for sub-45nm has advantage for one dimensional line and space pattern.

Proceedings Article | 5 April 2007 Paper

Paper

Hardware, materials, and parameters optimization for improvement of immersion overlay

Won-Kwang Ma, Young-sun Hwang, Eung-kil Kang, Sarohan Park, Jung-Hyun Kang, Chang-moon Lim, Seung-chan Moon

Proceedings Volume 6518, 65182Z (2007) https://doi.org/10.1117/12.712026

KEYWORDS: Semiconducting wafers, Thin film coatings, Overlay metrology, Optical alignment, Immersion lithography, Materials processing, Scanners, Protactinium, Calibration, Photomasks

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Proceedings Article | 2 April 2007 Paper

Paper

Study on the reduction of defects in immersion lithography

Keundo Ban, Sarohan Park, Cheolkyu Bok, Heeyoul Lim, Junggun Heo, Hyunsook Chun, Junghyun Kang, Seungchan Moon

Proceedings Volume 6519, 65191V (2007) https://doi.org/10.1117/12.712029

KEYWORDS: Bridges, Semiconducting wafers, Immersion lithography, Molecular bridges, Particles, Thin film coatings, Photoresist processing, Coating, Lithography, Metrology

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Proceedings Article | 26 March 2007 Paper

Paper

Hyper NA polarized imaging of 45nm DRAM

Chang-Moon Lim, Sarohan Park, Yoon-Suk Hyun, Jin-Soo Kim, Tae-Seung Eom, Jun-Taek Park, Seung-Chan Moon, Jin-Woong Kim

Proceedings Volume 6520, 65200B (2007) https://doi.org/10.1117/12.712442

KEYWORDS: Polarization, Optical lithography, Photomasks, Birefringence, Transmittance, Scanners, Lithography, Lithographic illumination, Immersion lithography, Critical dimension metrology

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Proceedings Article | 14 May 2004 Paper

Paper

High etch rate ArF BARC composed of polyester

Young Sun Hwang, Jae Chang Jung, Keun Do Ban, Sarohan Park, Cheol Kyu Bok, Seung Chan Moon, Ki Soo Shin

Proceedings Volume 5376, (2004) https://doi.org/10.1117/12.534763

KEYWORDS: Etching, Coating, Semiconducting wafers, Lithography, Photoresist processing, Bottom antireflective coatings, Line edge roughness, Light sources, Optical lithography, Sun

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Showing 5 of 17 publications

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