This paper reports the extracted risk issues on practical EUV resist processes and discusses verifications of them. The
risk issues were extracted with emphasis on critical dimension, defectivity and productivity for mass production EUV
resist processes. The authors verified these risk factors by utilizing available empirical knowledge. The authors found
that the micro loading effect of by-product in the resist development process was a key factor for CD uniformity. Also
discovered, was that high surface energy differences on the patterned wafers were a key factor for defectivity. As a result,
application of scan-dynamic development and dynamic scan rinse to EUV processes on a mass production level will
contribute greatly to CD and defect control as well as productivity.
Subsequent to 45 nm node, immersion lithography using topcoat process is approaching its next step for mass
production. However, microfabrication using immersion topcoat leads to increase in cost due to increase in process
steps. In order to deal with this problem, high throughput scanners equipped with a wafer stage which moves at higher
speed are under development. Furthermore, as resist process compatible with such high speed scanners, non-topcoat
resist is available and seems promising in reducing costs of the resist process. Non-topcoat resist contains hydrophobic
additives which are eccentrically located near the film surface. Because non-topcoat resist enables the formation of a
more hydrophobic surface, non-topcoat resist process is more suitable for high-speed scanning than topcoat resist
process. In the topcoat process, the function of topcoat material and resist material is separated. That is, the resist
material and the topcoat material are responsible for lithographic performance and immersion scanning performance,
respectively. However, the non-topcoat resist is expected both performances. That is, the non-topcoat resist are
required a fine resist profile, small LWR, and low development defects at high speed immersion scanning. In this
paper, we report the application of non-topcoat resist in 22 nm node devices. We investigate the influence of
hydrophobic additives on imaging performance in several base polymers. Additionally, the influence of chemical
species, molecular weight and amount of hydrophobic additive are investigated. Scan performance is also estimated by
dynamic receding contact angle using pin scan tool. 22nm node imaging performance is evaluated using Nikon NSRS610C.
The surface characteristics and lithographic performance of non-topcoat resist for 22 nm node devices are
discussed.
The lithography process on topographic substrate is one of the most critical issues for device manufacturing.
Topographic substrate-induced focus variation occurs between top position and bottom position in a layer. That is,
common depth of focus is reduced. This focus variation is sure to ruin the focus budget in low k1 lithography.
From the focus budget of CMOS device, substrate topography is required to be less than 30nm for hp 45-nm
generation devices and less than 15nm for hp 32-nm generation devices.
In this paper, the authors evaluate a novel concept for hp45-nm generation dual damascene layer for global surface
planarization. The novel concept is thin planarization layer with bottom anti-reflecting (BAR) function. This
planarization layer with optical performance is materialized by UV crosslink materials and process. This concept is
expected to lead to a simpler planarization process. Thin planarization layer with BAR function clear BARC layer and
simplifies the etching process.
Our study showed that the planarization performance of UV crosslink layer with 100nm thickness was 20nm
thickness bias between the field area and dense via hole area. This thickness bias achieved the requirement of hp
45nm generation. Furthermore, fine resist pattern was resolved on the planarization layer by the optimization of acid
components and additive.
Line width roughness (LWR) reduction is a critical issue for low k1 ArF immersion lithography. Various approaches
such as materials, exposure technology and the track process have been performed for LWR reduction during
lithography process.
It was reported that the post-development bake process had good performance for LWR reduction (1). However, the
post-development bake process induced large CD change owing to the degradation of large isolated resist pattern.
Therefore post-development process with small iso-dense bias is required in low k1 ArF immersion lithography.
The resist smoothing process is one of the candidates for LWR reduction with small iso-dense bias. This method
whereby the resist pattern surface is partially melted in organic-solvent atmosphere was shown to have a significant
LWR reduction effect on resist patterns. This paper reports on the application of the resist smoothing process to the
ArF immersion resist pattern after development. It was found that the resist smoothing process was effective to reduce
LWR for ArF immersion resist. As a result of LWR trace from after development to after the hard mask etching process,
the effect of LWR reduction with the resist smoothing process continued after the hard mask etching process.
Furthermore CD change of large isolated patterns with the smoothing process was smaller than in the case of post-development
bake process. We confirmed that the resist smoothing process is an effective method for decreasing LWR
in ArF immersion lithography.
Key issues of resist process design for 32nm node logic device were discussed in this paper. One of them is reflectivity
control in higher 1.3NA regime. The spec for the reflectivity control is more and more severe as technology node
advances. The target of reflectivity control over existent substrate thickness variation is 0.4%, which was estimated from
our dose budget analysis. Then, single BARC process or stacked mask process (SMAP) was selected to each of the
critical layers according to the substrate transparency. Another key issue in terms of material process was described in
this paper, that is spin-on-carbon (SOC) pattern deformation during substrate etch process. New SOC material without
any deformation during etch process was successfully developed for 32nm node stacked mask process (SMAP). 1.3NA
immersion lithography and pattern transfer performance using single BARC
KEYWORDS: System on a chip, Etching, Reactive ion etching, Reflectivity, Hydrogen, Fluorine, Lithography, Photoresist processing, Silica, Scanning electron microscopy
The stacked-mask process (S-MAP) is a tri-level resist process by lithography and dry etching, which consists of thin
resist, spin-on-glass (SOG), and spun-on carbon (SOC). However, as design rules progress below 60nm, two problems
arise in the conventional S-MAP: 1) the deformation of SOC line pattern during SiO2 reactive ion etching (RIE), 2) the
degradation of lithography performance due to high reflectivity at the interface between resist and SOG in high NA. In
this study, we clarified the origin of the above problems and improved S-MAP materials and processes. Firstly, we
found that the pattern deformation is induced by the inner stress due to volume expansion by fluorination during RIE,
and that the deformation is suppressed by decreasing hydrogen content of SOC. Secondly, we developed new carbon-containing
SOG that coexists with low reflectivity and acceptable etching performance. Using the above SOG and SOC,
we developed a new S-MAP that shows an excellent lithography / etching performance in sub-45nm device fabrication.
Immersion lithography is widely expected to meet the manufacturing requirements of future device nodes. A critical
development in immersion lithography has been the construction of a defect-free process. Two years ago, the authors
evaluated the impact of water droplets made experimentally on exposed resist films and /or topcoat. (1) The results
showed that the marks of drying water droplet called watermarks became pattern defects with T-top profile.
In the case that water droplets were removed by drying them, formation of the defects was prevented. Post-exposure
rinse process to remove water droplets also prevented formation of the defects.
In the present work, the authors evaluated the effect of pre- and post-exposure rinse processes on hp 55nm line and
space pattern with Spin Rinse Process Station (SRS) and Post Immersion Rinse Process Station (PIR) modules on an inline
lithography cluster with the Tokyo Electron Ltd. CLEAN TRACKTM LITHIUS TM i+ and ASML TWINSCAN
XT:1700Fi , 193nm immersion scanner.
It was found that total defectivity is decreased by pre- and post-exposure rinse. In particular, bridge defects and large
bridge defects were decreased by pre- and post-exposure rinse.
Pre- and post-exposure rinse processes are very effective to reduce the bridge and large bridge defects of immersion
lithography.
In immersion lithography, it is necessary that the surface of wafer has high hydrohybicity in order to prevent the residue of immersion fluid, i.e. pure water, that cause watermark defect. Usage of a cover material film over the resist film is effective to consistent with high hydrohybicity of the surface and high performance of resist film. But it was problem that much pattern deformation defects was observed with the use of an alkali-soluble type cover material film and an immersion exposure tool. As a result of the examination, it was identified that the fraction of film which caused the pattern deformation in the area of several micrometers were the fraction of the cover material. And the fractions of cover coat material were oriented in the coating defects of the cover material film and in the film peeling after scan of the immersion nozzle at the wafer bevel. The coating defects were improved with the chemical of the cover material. An adhesion process was effective to prevent the film peeling of cover material.
KEYWORDS: Scanning electron microscopy, Semiconducting wafers, Digital watermarking, Immersion lithography, Silicon, Photoresist processing, Thin film coatings, Coating, Liquids, Water
In the liquid immersion lithography, uses of the cover material (C/M) films were discussed to reduce elution of resist components to fluid. With fluctuation of exposure tool or resist process, it is possible to remain of waterdrop on the wafer and watermark (W/M) will be made. The investigation of influence of the W/M on resist patterns, formation process of W/M, and reduction of pattern defect due to W/M will be discussed. Resist patterns within and around the intentionally made W/M were observed in three cases, which were without C/M, TOK TSP-3A and alkali-soluble C/M. In all C/M cases, pattern defect were T-topped shapes. Reduction of pattern defects due to waterdrop was examined. It was found that remained waterdrop made defect. It should be required to remove waterdrop before drying, and/or to remove the defect due to waterdrop. But new dry technique and/or unit will be need for making no W/M. It was examined that the observation of waterdrop through the drying step and simulative reproduction of experiment in order to understand the formation mechanism of W/M. If maximum drying time of waterdrop using immersion exposure tool is estimated 90 seconds, the watermark of which volume and diameter are less than 0.02 uL and 350um will be dried and will make pattern defect. The threshold will be large with wafer speed become faster. From result and speculations in this work, it is considered that it will be difficult to development C/M as single film, which makes no pattern defects due to remained waterdrop.
Recently, gate length variation such as Line Width Roughness (LWR) is severe problem in MPU. The LWR of resist pattern is mainly due to resist material and optical contrast. However it is hard to improve these factors. Many techniques have reported to decrease LWR, but there were no reports which process was more effective for improvement on LWR. Some methods were considered to improve resist roughness. This paper discusses about LWR of ArF resist in gate layer of 65 nm node device. We tied post bake process after development to smooth resist pattern surface by its surface tension. Recess process of resist roughness by using a pattern shrink film was also investigated. LWR’s were 36% and 26% decreased by post baking process and recess process, respectively. Post bake temperature was near resist melting point. From the consideration of thermal flow process, distance of smoothing force by surface tension is considered about several hundreds nm. Pattern shrink film is using acid catalysis reaction, so its distance of smoothing by acid diffusion is considered about one hundred nm. It is considered that effect of post development process is caused by distance of smoothing force. Moreover influence of those processes for lithographic performance will be evaluated.
We have successfully achieved accurate alignment to remove stacked TiN/Ti/Al/TiN/Ti films on damascene W marks by using laser ablation technology. Because, the Al films deposited on the damascene W marks lead to poor quality of alignment accuracy due to the asymmetric topography of the deposited Al surfaces. In the case that the TiN/Ti film is not formed on the Al surface, high-density plasma is formed above the Al surface during laser irradiation. This plasma screens off the surface from laser irradiation. Therefore, it is difficult that the naked Al films are removed completely by the laser irradiation. From the results of thermal analysis of the TiN/Ti/Al films during laser irradiation, it is concluded that the irradiation fluence should be controlled as abrupt evaporation occurs at the Al surfaces without evaporation of the top TiN/Ti films. In this condition, the plasma cannot be formed above the TiN/Ti surfaces during laser irradiation. Therefore, the irradiation energy is absorbed efficiently in the TiN/Ti films and the TiN/Ti/Al/TiN/Ti films could be removed completely by laser irradiation.
The global alignment random of wafer alignment after the TiN/Ti/Al/TiN/Ti film ablation on the W marks is equal to that of the ideal W marks before the Al film deposition. These results mean that the laser ablation is the most effective technology for locally removing thin metal films on alignment marks to achieve accurate alignment.
We normally apply a precise amount of electrical feedback into the laser injection current, to stabilize the oscillation frequency of a semiconductor laser. This feedback method usually needs a small direct modulation to the laser injection current, to obtain an error signal. This broadens the oscillation width of the laser diode, but certain applications, such as those related to coherent optical communications, benefit from, and in fact require narrower oscillation linewidth. We obtain the error signal, and stabilize the laser oscillation frequency in narrower oscillation linewidth, using the Faraday effect of the Rb absorption line. Our next task involves frequency-stabilization, which we accomplish, using a large frequency discrimination gain (Gd). By incorporating our "PEAK" circuit, which utilizes the envelope detection method to determine the switching points between two different absorption signals corresponding to the different magnetic fields and different polarization conditions, we increases the Gd in our stabilization system.
Two kinds of development processes were investigated. One is two-step development in which surface treatment using ozonated water was employed between the two steps of the development. The other is development in which ozonated water and hydrogenated water were employed in the pre-treatment step and the post-treatment step. The above-mentioned processes were applied to KrF resist process of 130nm generation. By pre-treatment using ozonated water and two-step development using ozonated water in inter-treatment, the shot-to-shot CD variation of isolated line (line width = 180nm) and the intra-shot variation were improved from 6.6nm to 4.4nm and from 13.5nm to 8.6nm, respectively. And the total variation was greatly improved from 15.0nm to 8.6nm. Moreover, the number of defects was greatly decreased by post-treatment using ozonated water and hydrogenated water continuously.
In the tri-level resist process, it is sometimes difficult to detect the alignment mark because of the anti-reflection performance of the organic thick anti-reflective (ARL). Laser ablation in running water was one of the most effective techniques for removing the organic thick ARL on the alignment mark. Generally, the ablation process produces many particles. The results of our experiment indicate that the particle distribution area greatly depends on the dome-shape bubble on the ablation area. The particle distribution area could be minimized by optimizing some ablation conditions according to the estimated size of the dome-shape bubble. By optimizing a shift of the narrow slit-laser-beam and its energy so as to keep the ablation/initial thickness ratio to less than 20%, fine ablation area could be obtained. This novel ablation technique is very useful for particle-free selective removal of the organic thick ARL film.
In fabrication of next-generation photomask for devices under 100 nm, more precise control of critical dimension (CD) is required. Each process for the photomask fabrication must be developed corresponding to each requirement of CD accuracy. The same applies to post-exposure baking (PEB) and post-coat baking (PCB), and so more precise control of reaction amount in baking is required. Multiple zone-controlled type of hot plate to improve uniformity of temperature has been enthusiastically developed Generally, conventional hot plates don't directly control the temperature of resist film because its measurement means, for example, thermo-couples or resistance bulb are embedded near the surface of hot plate, and so cannot accurately control resist temperature. We think next-generation baking technology should involve direct measurement and control of the actual temperature of films. Furthermore, serious problems arose in that heat history in PEB was different in each pattern area, such as mask center or edge, and large overshooting of temperature was caused in photomask baking because heat capacity of quartz is very large and heat transfer speed of quartz is very slow. To solve this problem, it is necessary to control resist temperature directly by means of a quick response. It is difficult to satisfy this requirement with conventional bakers of the hot plate type or with such bakers to which a minor improvement has been made to achieve the quick response. To realize the quick response, the four following concepts are needed. (i) Quick response of heat source for resist film (ii) Direct measuring of temperature of resist film (iii) Shortening interval of feedback (iv) Improvement of repeatability ofmeasuring temperature We have studied a candidate next-generation baking technology for photomask fabrication, namely a novel baking system consisting of halogen lamps and non-contact type thermometers. We call this novel baking system "Lamp Heater System". In this paper, the heating performance is reported.
For low-k1 lithography, high accurate control of the development process is required. For that purpose, low- impact dispensing is one of the most effective approaches. In that process, development time differs between start and end position of nozzle-scan. To reduce the time lag, the nozzle-scan-speed of 140mm/s was selected. But critical dimensions (CD) offset that depends on scan-direction was detected. From the results of the CD and dissolution performances for three resists, we found that the pull-back flow of the developer was the main cause of the CD offset. Thus, it is important that the developer does not flow by its pull-back-force. By observing and analyzing the flow of the dissolution product with a video camera, the best condition of the scan-speed (=60 mm/s) was selected. Under this nozzle-scan condition, the dissolution rates did not depend on the scan-direction of the dispenser-nozzle. As a result, the small CD offset could be observed for 200nm L&S patterns.
A development monitor system capable of highly accurate control of pattern width has been established. This system is composed of a unique monitor pattern on the process wafer, the 0th order diffraction light measuring unit, and the image analysis and process control unit. In the conventional development process in which no monitor system is employed, the CD variation in 200nm line width was about 15nm when +/- 5 percent dose error exist. However, using the new system, 1nm of CD variation was obtained. In this article, a high-sensitivity monitor pattern is proposed and its performance in controlling 200nm line and space patterns in the development process is reported.
Lithographic characteristics of dual-trench type alternating phase-shifting mask (PSM), whose shifters are made of perpendicular trenches with different depth alternately, are evaluated numerically and experimentally. The structure of dual-trench type PSM could reduce the difference of adjacent peak intensities created by topography on the mask. Exposure characteristics of the mask varied with depth of deep and shallow trenches, and depth of both trenches should be controlled so as to have the optimum value. Mainly, the difference in depth of deep and shallow trenches caused varying "effective phase" and depth of shallow trench caused varying "effective transmission". The depth of focus using the mask was sensitive to the effective phase difference controlled by adjusting etched depth difference between both trenches, and insensitive to depth of shallow portion. From analysis of mask process margin, respecting acceptable error of depth of both trenches, it was found that the effective transmission error caused reduction of acceptable depth error.
An aging process that makes SiNx single-layer halftone film stable for DUV (248 nm) exposure has been established. The light irradiation with a low pressure mercury lamp was used to age the SiNx halftone film from the tendency of the transmittance change caused by the DUV exposure. Taking account of the optical constants shift during aging process, a SiNx halftone film with transmittance T equals 9.3%, phase shift angle (theta) equals 178 degrees was obtained. At the SiNx film, no transmittance change was observed after 2800 J/cm2 DUV exposure. Using the mask, 0.2 micrometers hole patterns were obtained with above 1.0 micrometers depth of focus (DOF).
Masks and their fabrication technologies are keys to the further advancement of optical lithography. A stable SiNx single layer attenuated masks for DUV have been developed. A 0.2 micrometers contact hole pattern was fabricated using a KrF stepper with the SiNx attenuated mask. Toshiba mask fabrication system, including an electron beam writing system, a data base inspection system, and a data conversion system, has been developed for 64 Mbit DRAM class. Required mask improvements for increasing optical lithography resolution include better critical dimension (CD) uniformity, higher mask writing system resolution, and automatic shifter patten generation of alternating phase shifting masks. In addition, improved mask pattern positioning accuracy is also required. In this paper, experimental CD uniformity and resolution improvements, automatic phase shifter assignment method, and improvement in positioning accuracy, are described. The future development of masks will incorporate these key technologies.
An algorithm necessary to decide the optimum optical properties of a single-layer halftone (HT) mask has been established. This paper reveals the relations between the refractive index n and the extinction coefficient k, and thickness d, and describes how to select optimum films among various materials. It has been found that SiNx is a good material for a single-layer HT mask for I-line (365 nm) and KrF (248 nm). The lithographic performance of an I-line SiNx HT mask for grouped line and space (L&S) patterns under annular illumination has also been demonstrated.
Surface modification of novolac type photoresist was investigated
by alkali treatment in KrF excimer laser lithography. It was
clarified from FTIR, ESCA, and UV spectrum analysis that the
formation of an insoluble layer on the resist surface is due to the
existence of a concentrated layer of a photoactive compound.
This insoluble layer improved the top profile of the resist
pattern and suppressed film thickness loss, but was not effective
for controlling the linewidth in the succeeding reactive ion etching
process. The wall angle of the resist profile was found to be the
most important factor for decreasing the linewidth shift through
reactive ion etching. Lateral modification of the resist side wall
was conceived to improve the wall angle from the result of analyzing
surface modification.
As a result, vertical profiles of sub-halfmicron patterns were
obtained successfully, which was realized by a combination of alkali
treatment before exposure and multi-step development.
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