The Space Dynamics Laboratory (SDL) has developed an FPGA-based hyperspectral demonstration
compression system. The system consists of two boards: the first board performs a decorrelation process
using a 5/3 wavelet; the second board performs the JPEG 2000 image compression. The hardware and
firmware design of this system is described here and data is presented that shows the results of compressed
hyperspectral data cubes containing various types of image content. This paper presents the importance of bit
rate control among the individual spectral bands. Some of the theory for basing bit rate control on JPEG 2000
compression, bit rate control based on the 5/3 wavelet, as well as advantages and disadvantages of each
method are discussed. Concepts for developing hyperspectral image compression technology for systems that
can be used for remote sensing in real applications are also presented.
The Space Dynamics Laboratory (SDL) has developed a JPEG 2000 image compression demonstration board that implements both Tier1 and Tier2 JPEG 2000 encoding in two Xilinx Virtex II FPGAs. This board was built as a first step toward developing JPEG 2000 image compression hardware that could be used for remote sensing on the ground, in the air, or in Earth orbit. It has been used to demonstrate the power and flexibility of the JPEG 2000 standard in hardware, compressing both 8-bit and 12-bit grayscale images based on decoded image quality as well as output bit rate control. Images have also been compressed in both lossless and lossy modes. The board produces a JPEG 2000 file that includes all header and packet information needed to decode the output file. The output file can be decompressed directly or manipulated in software to enhance certain features of the compressed image. Throughput for the demonstration board is a function of wavelet type and bit depth. The demonstration board can be used in several different configurations as presented in this paper.
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