In advanced semiconductor manufacturing, model-based optical proximity correction is commonly used to compensate for image errors. The final pattern is generated using correction values determined by lithography simulation. Image errors such as patterns with insufficient correction or patterns with excessive correction can be generated. These patterns with errors are called hotspots. Such errors are conventionally detected by lithography simulation of OPC patterns. When a hotspot is detected by lithography simulation, it has to be repaired manually or by repeated use of OPC tool. However, it is difficult to obtain correct pattern for a complicated shape, and the correction procedure may require a significant amount of additional processing. In order to solve this issue, we examine application of cellular automata (CA) method for hotspot correction. It is known that CA method can be used for weather or traffic analysis and prediction. In this report, we studied the CA method for deriving simple hotspot repair rule based on lattice cell-like models for light intensity distribution and OPC patterns. We will report on the results of hotspot correction technique with the OPC pattern using CA method.
In semiconductor manufacturing, scribe frame data generally is generated for each LSI product according to its specific
process design. Scribe frame data is designed based on definition tables of scanner alignment, wafer inspection and
customers specified marks. We check that scribe frame design is conforming to specification of alignment and
inspection marks at the end. Recently, in COT (customer owned tooling) business or new technology development, there
is no effective verification method for the scribe frame data, and we take a lot of time to work on verification. Therefore,
we tried to establish new verification method of scribe frame data by applying pattern matching and DRC (Design Rule
Check) which is used in device verification. We would like to show scheme of the scribe frame data verification using
DRC which we tried to apply. First, verification rules are created based on specifications of scanner, inspection and
others, and a mark library is also created for pattern matching. Next, DRC verification is performed to scribe frame data.
Then the DRC verification includes pattern matching using mark library. As a result, our experiments demonstrated that
by use of pattern matching and DRC verification our new method can yield speed improvements of more than 12 percent
compared to the conventional mark checks by visual inspection and the inspection time can be reduced to less than 5
percent if multi-CPU processing is used. Our method delivers both short processing time and excellent accuracy when
checking many marks. It is easy to maintain and provides an easy way for COT customers to use original marks. We
believe that our new DRC verification method for scribe frame data is indispensable and mutually beneficial.
The computer cost for mask data processing grows increasingly more expensive every year.
However the Graphics Processing Unit (GPU) has evolved dramatically. The GPU which
originally was used exclusively for digital image processing has been used in many fields of
numerical analysis. We developed mask data processing techniques using GPUs together with
distributed processing that allows reduced computer costs as opposed to a distributed processing
system using just CPUs.
Generally, for best application performance, it is important to reduce conditional branch
instructions, to minimize data transfer between the CPU host and the GPU device, and to optimize
memory access patterns in the GPU. Hence, in our optical proximity correction (OPC), the light
intensity calculation step, that is the most time consuming part of this OPC, is optimized for GPU
implementation and the other inefficient steps for GPU are processed by CPUs . Moreover, by
fracturing input data and balancing a computational road for each CPU, we have put the powerful
distributed computing into practice.
Furthermore we have investigated not only the improvement of software performance but also how
to best balance computer cost and speed, and we have derived a combination of the CPU hosts and
the GPU devices to maximize the processing performance that takes computer cost into account .
We have also developed a recovery function that continues OPC processing even if a GPU breaks
down during mask data processing for a production. By using the GPUs and distributed
processing, we have developed a mask data processing system which reduces computer cost and has
high reliability.
Owing to reduction of LSI device pattern, verification of mask pattern after optical proximity correction, OPC, by using
Litho-Simulation becomes common practice. The verification using Litho-Simulation does not only increase reliability,
but also the verification time. To solve this problem, we extract error patterns and categorize them, and we review only
the representative pattern of each category to save time. But further reduction of device pattern might increase the
verification time. There is loose matching method to save the time, but it has a week point such that accuracy of
categorization is trade-off with error pattern number to be reviewed.
We tried a method of categorization referring to original pattern, CROP. The CROP method categorizes error patterns
referring to original pattern extracted by the position data of the error pattern. For this reason, categorization of error
patterns is accurate, and the number category of a product pattern is reduced to1/50 compared with pattern matching
method, which is loose matching method with 0 nm matching size.
Slight change of OPC pattern shape may influence transistor characteristics. So inputting the result of Litho-
Simulation, Contour, to SPICE-simulator, we investigated the change of the transistor characteristic. First of all, we
investigated the sensitivity of the transistor characteristics to OPC pattern change. We found that the difference of shape
with Isolated, Dense pattern, and a different OPC tool caused difference after SPICE-simulation. In this investigation, we
report focusing on the transient and DC analysis of transistor characteristics. Contour data was measured and averaged
before input to SPICE and a change of transistor characteristic was able to be detected. We came to the conclusion that
this investigation method is effective to check the influence of the transistor characteristics due to OPC pattern change.
And we can adopt this method as one technique for deciding the applicability of the OPC tool and its upgrade, which
were issues for MASK data processing.
We investigated the possibility of hotspot detection after lithography simulation by using Neural Networks (NN). We
applied the image recognition technique by the NN for hotspot detection and confirmed the possibility by its recognition
rate of the device pattern defects after NN learning.
Various test patterns were prepared for NN learning and we investigated the convergence and the learning time of the
NN. The compositions of the input and the hidden-layers of the NN do not have so much influence on the convergence
of NN, but the initial parameter values of weight setting have predominant effect on the convergence of the NN. There
are correlations among the learning time of the NN, the number of input samples and the number of hidden-layers, so a
certain consideration is required for NN design.
The hotspot recognition rate ranged from 90% to 42%, depending pattern type and learning sample number. Increasing
learning sample number improves the recognition rate. But learning all type patterns leads to 55% recognition, so
learning single type pattern leads to better recognition rate.
KEYWORDS: Data conversion, Data processing, Optical proximity correction, Data storage, Data modeling, Photomasks, Logic devices, Binary data, Data compression, Instrument modeling
OASIS(Open Artwork System Interchange Standard) format was investigated for various logic device datas. In this investigation, the change in the processing time of the confirmation of the content of compression in OASIS and the mask data processing were confirmed.
OASIS format has higher data compressibility than other methods, and its compressibility is independent on the data size. It is very effective in a advanced technology device according to the above-nentioned investigations. In data storage and data handling, applying after OPC processing is quite effective.
This paper reports a technique of reticle inspection incorporating the use of an image filter. In this technique, optical intensity distribution is calculated by optical simulation of electron beam lithography (EB) data or an image file obtained from a SEM photograph to evaluate the printability of defects on a reticle. When an image file is compared with the EB data, the image file has differences at the rounded corners as well as at the areas with defects because the image file is obtained from the reticle pattern. To reduce the differences, an image filter (or reticle filter), which simulates the pattern creation process on a reticle, was applied to the EB data. The simulated EB data is defined as the non-defect reference pattern. The optical intensity and critical dimension (CD) were then obtained. Image files of defects were obtained from the SEM photographs of reticle patterns having various sizes of defects. By applying optical simulation to patterns obtained from the image files, the optical intensity and CD were calculated and compared with those of the reference pattern, and the differences are evaluated. The evaluation results showed that optical intensity and CD changes fluctuate regardless of the size or type of defect. Correlation was confirmed between the differences in optical intensity and the CD changes in the defect area. It was thus concluded that defect printability can be evaluated by the differences in optical intensity obtained from image files.
By generating supplementary patterns for EB data and using a system that corrects patten line widths, we improved the shape of a pattern formed on a photomask and the CD linearity. For the EB lithography system, trapezoidal and hammerhead supplementary patterns were applied in order to suppress the increase in EB data volume. As a result, it became possible to reduce the supplementary patterns generated to about 60 percent of the existing serif supplementary patterns. The formed pattern shapes were also equivalent. Since the laser lithography system requires bigger correction pattern shapes than the EB lithography system, triangle supplementary patterns were used. As a result, the corner round was improved with the number of patterns equivalent to that of existing rectangle supplementary patterns. For the CD-linearity, the CD correction amount was set for each line width from the experiment result. For 5 micrometers to 0.7 micrometers patterns on a photomask, a CD-linearity could be achieved within 40nm. We developed the system with above method, when the system is applied to 0.18 micrometers logic contact holes, the elapse time is 1.4 hours and the EB data file size is for 2.5 to 10.8 times the number of original patterns. We judged that it was in the practical level.
In order to produce a streak tube operated easily, we have developed a new streak tube having ultra-high deflection sensitivity based on a new design concept. Both the low photocathode voltage of -2 kV referred to the anode and the long deflection plate of 63 mm made it possible to achieve the deflection sensitivity of 670 mm/kV. Furthermore, the temporal resolution of 2 ps was achieved by applying a high electric field of 2 kV/mm between the photocathode and the acceleration mesh electrode.
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