This Conference Presentation, “Compact modeling and parametric extraction of phase shifters in carrier-depletion Mach-Zehnder silicon modulators,” was recorded for the Photonics West 2021 Digital Forum.
Silicon photonics IC’s are fabricated in CMOS/MEMS lines, and need wafer-level testing and inspection for optical performances. Although optical characteristics evaluations of waveguide and grating coupler have been reported, there is no reports for optical characteristics of a light introduction window from a flip-chip mounted laser diode to a waveguide in a silicon photonics IC. In this paper, we’ll discuss a 5 µm-deep SiO2 clad etching process to fabricate this light introduction window by using a wafer-level optical probing system [1]. Several deep-etched trenches were introduced in the SiO2 clad optical path to measure the optical loss at the windows consisting of well-aligned two waveguides. Three different SiO2 etch conditions to vary the trench sidewall roughness were applied. The gap distance between two waveguides was 2 µm, and the trench width was 1 µm. The measured optical loss at the etched SiO2 surface was about -0.5 dB for the smoother sidewall surface, and increased to -0.6 dB for the rougher surface. This indicates our new method can evaluate the loss difference of the SiO2 surface roughness to 0.1 dB precision. Surface loss distributions over the wafer were about the same for every etch conditions which reflected uniform etching conditions over the wafer. It was confirmed the optical probing system is useful for in-line process monitoring. Impact of the sidewall angle will be discussed at the presentation. This research was supported by New Energy and Industrial Technology Development Organization, Japan. [1] T. Horikawa, et al., Microelectron. Eng., 156, 46 (2016).
We previously proposed a photonics-electronics convergence system to solve bandwidth bottlenecks among large scale integrations (LSIs) and demonstrated a high bandwidth density with silicon optical interposers at room temperature. For practical applications, interposers should be usable under high temperature conditions and rapid temperature changes so that they can cope with the heat generated by mounted LSIs. We designed and fabricated athermal silicon optical interposers integrated with temperature-insensitive components on a silicon substrate. An arrayed laser diode (LD) chip was flip-chip bonded to the substrate. Each LD had multiple quantum dot layers with a 1.3-µm lasing wavelength. The output power was higher than 10 mW per channel up to 100º C. Silicon optical modulator and germanium photo detector (PD) arrays were monolithically integrated on the substrate. The modulators were structured as symmetric Mach- Zehnder interferometers, which were inherently temperature insensitive. The phase shifters composed of p-i-n diodes were stable against temperature with constant bias currents. The PD photo current was also temperature insensitive and the photo-to-dark current ratio was higher than 30 dB up to 100º C. We achieved error-free data links at 20 Gbps and high bandwidth density of 19 Tbps/cm2 operating from 25 to 125º C with the interposers without adjusting of the LDs, modulators, or PDs. The interposers are tolerant of the heat generated by the mounted LSIs and usable over the extended industrial temperature range without complex monitoring or feedback controls. The bandwidth density is sufficient for the needs of the late 2010s.
We present flatband, low-loss and low-crosstalk characteristics of Si-nanowire-based 5th-order coupled resonator optical waveguides (CROW) fabricated by ArF-immersion lithography process on a 300-mm silicon-on-insulator (SOI) wafer.
We theoretically specified why phase controllability over Si-nanowire waveguides is prerequisite to attain desired
spectral response, discussing spectral degradation by random phase errors during fabrication process. It was
experimentally demonstrated that advanced patterning technology based on ArF-immersion lithography process showed
extremely low phase errors even for Si-nanowire channel waveguides. As a result, the device exhibited extremely low
loss of <0.2dB and low crosstalk of <-40dB without any external phase compensation. Furthermore, fairly good spectral
uniformity for all fabricated devices was found both in intra-dies and inter-dies. The center wavelengths for box-like
drop channel responses were distributed within 0.4 nm in the same die. This tendency was kept nearly constant for other
dies on the 300-mm SOI wafer. In the case of the inter-die distribution where each die is spaced by ~3cm, the deviation
of the center wavelengths was as low as ±1.8 nm between the dies separated by up to ~15 cm. The spectral superiority was reconfirmed by measuring 25 Gbps modulation signals launched into the device. Clear eye openings were observed as long as the optical signal wavelengths are stayed within the flat-topped passband of the 5th-order CROW. We believe these high-precision fabrication technologies based on 300-mm SOI wafer scale ArF-immersion lithography would be promising for several kinds of WDM multiplexers/demultiplexers having much complicated configurations and requiring much finer phase controllability.
One of the most serious challenges facing the exponential performance growth in the information industry is a bandwidth bottleneck in inter-chip interconnects. Optical interconnects with silicon photonics have been expected to solve the problem because of the intrinsic properties of optical signals and the industrial advantages of silicon for use in the electronics industry. We therefore propose an optical interconnect system by using silicon photonics to solve the problem. We examined integration between photonics and electronics and integration between light sources and silicon substrates, and we propose a photonics-electronics convergence system based on these examinations. We also investigated the configurations and characteristics of optical components for the system, including silicon spot-size converters, silicon optical waveguides, silicon optical splitters, silicon optical modulators, germanium photodetectors, and arrayed laser diodes. We then demonstrated the feasibility of the system by fabricating a high-density silicon optical interposer by using silicon photonics hybridly integrated with arrayed laser diodes and monolithically integrated with the other optical components on a single silicon substrate. The pad pitches of optical modulators and photodetectors were designed to be 100 μm so that LSI bare chips were able to contact to them electrically by flip-chip bonding. Since this system was optically complete and closed and no temperature sensitive component was used, we did not need to align the fibers, control the polarization, or control the temperature throughout the experiments. As a result, we achieved errorfree data links at 20 Gbps and high bandwidth density of 30 Tbps/cm2 with the silicon optical interposer.
This paper presents a newly developed process technology to integrate the BaxSr1-xTiO3(BST) thin film prepared by an rf magnetron sputtering. Evaluations of the integrated BST capacitors on a test element group (TEG) structure revealed some of key issues for a successful integration. A two-step sputtering method comprising the first step to form a nucleation layer and the second step to form the main part of the BST film was found to be useful for preventing the dielectric properties of the integrated BST thin film from the degradation. A careful control of the shape of the lower structures such as the edge of the bottom electrode or the poly Si plug of the storage node turned to be indispensable to obtain the reliable capacitor and this recommends the extensive use of the process that can provide a flush surface such as the Chemical Mechanical Polishing (CMP) in the future integration. The interlevel dielectrics over the BST capacitor was shown to seriously affect the leakage characteristics and an undoped SiO2 film was most suitable for the integrity, implying the needs for another planarization technique instead of the glass reflow. Finally, a preliminary evaluation of the reliability and the normal bit function of a 4 Mbits DRAM, made of fully flat BST stacked capacitors, demonstrated the utility of the developed integration technology.
The laser-addressed ferroelectric liquid crystal light valve (FLCLV) consists of metal-insulator-semiconductor (MIS) photoconductive sensor and ferroelectric liquid crystal (FLC). It has a high resolving power of 50 1p/mm for laser pulse recording and 130 1p/mm for 2-dimensional image recording. The multibeam laser scanning method is applied in this display system, which achieves high writing speed (0.5 s/frame) and high resolution (1500 X 1600 pixels--higher than that of HDTV.
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