We demonstrate a 3D integrated 2D addressable VCSEL array that integrates high power 2D VCSEL array on a circuit board with a built-in laser driver by flip-chip bonding, resulting in high optical power density of 1,500 W/mm2 and short pulse duration of 2 ns. Each VCSEL is designed to oscillate at 940 nm and has seven junctions, large optical aperture and Cu pillar bumps for individual driving. Compared to our previous report5 , the optical output power is improved from 45 to 80 W/channel by increasing filling factor which is the ratio of active area to chip size from 33 % to 59 % and decreasing operating voltage by changing donor in tunnel junction from Si to Te. Additionally, the optical pulse shape has short rise time 1 ns and a narrow pulse width of 2 ns thanks to low inductance in this unique structure, and highly uniform optical pulse shape was observed in the plane due to small deviation of inductance from various positions of VCSEL array. We also confirmed that there was no degradation after 1000 hours of operation at an ambient temperature of 105 °C and 40 V, and after 1000 cycles of temperature cycle test from -40 to 125 °C in the module configuration. We believe that this advanced 3D integrated 2D addressable VCSEL array is the candidate for a light source of advanced LiDAR system with "ROI" (region of interest) focusing and low power consumption due to its zone-emission characteristics.
In this paper, we report a high efficiency, addressable 940 nm Vertical-Cavity Surface-Emitting Laser (VCSEL) array with a tight pitch of 10 m for a compact, low-power sensing light source. High electrical resistance of a small diameter semiconductor DBR is a major issue to obtain a high-power conversion efficiency in achieving a tight pitch VCSEL array. We have developed a highly efficient back side emitted VCSEL with intracavity contacted structure, mesa diameter of 7.5 μm, and optical aperture of 3.0 μm. The power conversion efficiency exceeded 30% from 0.5 mW to 3.5 mW in the wide power range. We also report Tx module using this highly efficient VCSEL with a tight pitch of 10 μm. The tight pitch addressable 2D VCSEL array required sophisticated process techniques because they have a small spacing of 2–3 μm between mesas. To improve productivity, we developed a new device structure decreasing the process difficulty between mesas and demonstrated 2D addressable VCSEL array arranged 64 by 64 matrix and 4096 emitters. In addition, we demonstrated addressable operation with assembled sample using Si interposer.
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